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| 型号： | LT3471EDD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 5/16页 |
| 文件大小： | 0K |
| 描述： | IC REG MULTI CONFIG ADJ DL 10DFN |
| 标准包装： | 121 |
| 类型： | 升压（升压），反相，回扫，Sepic |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 1 V ~ 40 V |
| 输入电压： | 2.4 V ~ 16 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.2MHz |
| 电流 - 输出： | 1.3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 10-DFN（3x3） |
| 产品目录页面： | 1331 (CN2011-ZH PDF) |
LT3471
BLOCK DIAGRAM
2
FB1P
+
A1
DRIVER
10 SW1
1
8
FB1N
V IN
–
1.00V
REFERENCE
V REF
R C
C C
3
∑
A2
R
S
Q
+
Q1
0.01Ω
–
9
4
SHDN/SS1
FB2P
+
LEVEL
SHIFTER
RAMP
GENERATOR
11 GND
6 SW2
A3
DRIVER
5
FB2N
–
R C
C C
A4
R
S
Q
Q2
7
SHDN/SS2
LEVEL
SHIFTER
∑
+
0.01Ω
–
RAMP
OPERATION
GENERATOR
1.2MHz
OSCILLATOR
Figure 1. Block Diagram
3471 F01
GND
The LT3471 uses a constant frequency, current mode
control scheme to provide excellent line and load regu-
lation. Refer to the Block Diagram. At the start of each
oscillator cycle, the SR latch is set, which turns on the
power switch, Q1 (Q2). A voltage proportional to the switch
current is added to a stabilizing ramp and the resulting
sum is fed into the positive terminal of the PWM compara-
tor A2 (A4). When this voltage exceeds the level at the
negative input of A2 (A4), the SR latch is reset, turning
off the power switch Q1 (Q2). The level at the negative
input of A2 (A4) is set by the error ampli?er A1 (A3) and
is simply an ampli?ed version of the difference between
the negative feedback voltage and the positive feedback
voltage, usually tied to the reference voltage V REG . In
this manner, the error ampli?er sets the correct peak
current level to keep the output in regulation. If the error
ampli?er’s output increases, more current is delivered to
the output. Similarly, if the error decreases, less current
is delivered. Each switcher functions independently but
they share the same oscillator and thus the switchers are
always in phase. Enabling the part is done by taking either
SHDN /SS pin above 1.8V. Disabling the part is done by
grounding both SHDN /SS pins. The soft-start feature of
the LT3471 allows for clean start-up conditions by limiting
the amount of voltage rise at the output of comparator A1
and A2, which in turn limits the peak switching current.
The soft-start feature for each switcher is enabled by
slowly ramping that switcher’s SHDN /SS pin, using an
RC network, for example. Typical resistor and capacitor
values are 0.33μF and 4.7k, allowing for a start-up time
on the order of milliseconds. The LT3471 has a current
limit circuit not shown in the Block Diagram. The switch
current is constantly monitored and not allowed to exceed
the maximum switch current (typically 1.6A). If the switch
3471fb
5
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| LT3472 | 制造商:LINER 制造商全称:Linear Technology 功能描述:Boost and Inverting DC/DC Converter for CCD Bias |
| LT3472EDD | 功能描述:IC REG BOOST INV ADJ 50MA 10DFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:1.24 V ~ 30 V 输入电压:1.5 V ~ 12 V PWM 型:电流模式，混合 频率 - 开关:600kHz 电流 - 输出:500mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:8-SOIC |
| LT3472EDD#PBF | 功能描述:IC REG BOOST INV ADJ 50MA 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LT3472EDD#PBF | 制造商:Linear Technology 功能描述:DC-DC CONVERTER BOOST 1.1MHZ 制造商:Linear Technology 功能描述:DC-DC CONVERTER, BOOST, 1.1MHZ, DFN-10 |
| LT3472EDD#TR | 功能描述:IC REG BOOST INV ADJ 50MA 10DFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:1.24 V ~ 30 V 输入电压:1.5 V ~ 12 V PWM 型:电流模式，混合 频率 - 开关:600kHz 电流 - 输出:500mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:8-SOIC |
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