参数资料
型号: LT3482IUD#PBF
厂商: Linear Technology
文件页数: 8/12页
文件大小: 0K
描述: IC REG BOOST ADJ 0.28A 16QFN
标准包装: 121
类型: 升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 1.24 V ~ 90 V
输入电压: 2.5 V ~ 16 V
PWM 型: 电流模式
频率 - 开关: 650kHz ~ 1.1MHz
电流 - 输出: 280mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
包装: 管件
供应商设备封装: 16-QFN-EP(3x3)
LT3482
APPLICATIO S I FOR ATIO
Inductor Selection
The inductors used with the LT3482 should have a satura-
tion current rating of 0.3A or greater. If the device is used in
an application where the input supply will be hot-plugged,
the saturation current rating should be equal to or greater
than the peak inrush current. For best loop stability, the
inductor value selected should provide a ripple current of
60mA or more. For a given V IN and V OUT1 , the inductor
value to use in continuous conduction mode (CCM) is
estimated by the formula:
capacitors C1 and C2 at the output nodes. A typical 0.1μF
capacitor is used as the ?ying capacitor C FLY to form the
charge pump. Always use a capacitor with suf?cient volt-
age rating.
Either ceramic or solid tantalum capacitors may be used
for the input decoupling capacitor, which should be placed
as close as possible to the LT3482. A 1μF capacitor is
suf?cient for most applications.
Phase Lead Capacitor
L =
where:
D ? V IN
? ? 60 mA
A small value capacitor (i.e., 10pF to 22pF) can be added
in parallel with the resistor between the output and the FB
pin to reduce output perturbation due to a load step and
to improve transient response. This phase lead capacitor
D =
V OUT 1 + 1– V IN
V OUT 1 + 1
introduces a pole-zero pair to the feedback that boosts
phase margin near the crossover frequency.
The APD is very sensitive to a noisy bias supply. To
and f is the switching frequency.
To achieve low output voltage ripple, a small value in-
ductor should be selected to force the LT3482 work in
discontinuous conduction mode (DCM). The inequality
is true when the LT3482 is operating in discontinuous
condition mode.
lowpass ?lter noise from the internal reference and error
ampli?er, a 0.1μF phase lead capacitor can be used. The
corner frequency of the noise ?lter is R1 ? C PL .
APD Current Monitor
The power supply switching noise associated with a switch-
L <
D ? V IN
? ? I LIMIT
ing power supply can interfere with the photodiode DC
measurement. To suppress this noise, a 0.1μF capacitor
is recommended at APD pin. An additional output lowpass
where I LIMIT is the switch current limit. Operating in DCM
reduces the maximum load current and the conversion
ef?ciency.
Capacitor Selection
Low ESR capacitors should be used at the output to
minimize the output voltage ripple. Use only X5R and
X7R types because they retain their capacitance over
?lter, a 10k resistor and a 10nF capacitor in parallel at
MON pin, can further reduce the power supply noise and
other wide band noise, which might limit the measurement
accuracy of low level signals. For applications requiring
fast current monitor response time, a RC lowpass ?lter at
MONIN pin is used to replace the 0.1μF capacitor at APD
pin, as illustrated in Figure 2.
R MON
wider voltage and temperature ranges than other types.
High output voltages typically require less capacitance for
loop stability. For applications with out voltage less than
45V, intermediate output pin V OUT1 can directly serve as
the output pin. Typically use a 2μF capacitor for output
voltage less than 25V and 1μF capacitor for output voltage
MONIN
LT3482
V OUT2
V OUT1
APD
C MON
C2
C1
between 25V and 45V. When output voltage goes beyond
45V, a charge pump must be formed with cascaded 0.47μF
3482 F02
Figure 2
3482fa
8
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