参数资料
型号: LT3507AIUHF#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: SWITCHING REGULATOR, PQCC38
封装: 5 X 7 MM, LEAD FREE, PLASTIC, QFN-38
文件页数: 13/28页
文件大小: 372K
代理商: LT3507AIUHF#PBF
LT3507A
20
3507af
APPLICATIONS INFORMATION
FB Resistor Network
The output voltage of the LDO regulator is programmed
witharesistordivider(RefertoBlockDiagram)betweenthe
emitter of the external NPN pass resistor and the feedback
pin, FB4. Choose the resistors according to
R1
=R2
VOUT4
800mV
1
The parallel combination of R1 and R2 should be 10k or
less to avoid bias current errors.
PROGRAMMABLE OVERVOLTAGE AND
UNDERVOLTAGE LOCKOUT
The LT3507A provides two input pins that allow user-
programmableovervoltageandundervoltagelockout.Both
the trip levels and hysteresis can be set by resistor values.
VINSW provides a switched VIN1 to minimize power con-
sumption in shutdown. VINSW is connected to VIN1 when
the LT3507A is operating, with a saturation voltage of
about 0.3V. It is high impedance when the LT3507A is in
shutdown (all three RUN pins low).
The programmable lockout is a pair of comparators with
the trip level set at 1.2V. The OVLO comparator trips when
the OVLO pin exceeds 1.2V while the UVLO comparator
trips when the UVLO pin drops below 1.2V. These com-
parators shut down all four regulators until the input
voltage recovers.
The comparators also activate current sources that gener-
ate hysteresis to eliminate chatter. The UVLO comparator
activates a 10A current sink on the UVLO pin. The OVLO
comparator activates a 10A current source on the OVLO
pin. These currents generate hysteresis voltage through
the resistance of the divider string.
Figure 11 shows a typical connection. The threshold
voltages are:
VOVTH = 0.3V +1.2V 1+
R3
R4
VUVTH = 0.3V +1.2V 1+
R1
R2
where 0.3V is the typical VIN1-VINSW voltage drop.
The hysteresis voltages are:
VOVHYST = 10A R3
VUVHYST = 10A R1
If the overvoltage lockout is not used, the OVLO pin must
be tied to ground. If the undervoltage lockout is not used,
the UVLO pin must be tied to VINSW.
Figure 11. Undervoltage and Overvoltage Lockout Circuit
+
+
1.2V
UVLO
VINSW
R3
R4
R1
R2
OVLO
10A
OVLO
3507A F11
PCB LAYOUT
For proper operation and minimum EMI, care must be
taken during printed circuit board (PCB) layout. Figure 12
shows the high current paths in the step-down regula-
tor circuit. Note that in the step-down regulators large,
switched currents flow in the power switch, the catch
diode and the input capacitor. The loop formed by these
components should be as small as possible. Place these
components, along with the inductor and output capacitor,
on the same side of the circuit board and connect them
on that layer. Place a local, unbroken ground plane below
these components and tie this ground plane to system
groundatonelocation,ideallyatthegroundterminalofthe
output capacitor C2. Additionally, keep the SW and BOOST
nodes as small as possible and away from any FB or VC
pins. Figure 13 shows an example of proper PCB layout.
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