参数资料
型号: LT3508HFE#PBF
厂商: Linear Technology
文件页数: 15/26页
文件大小: 0K
描述: IC REG BUCK ADJ 1.4A DL 16TSSOP
标准包装: 95
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.8 V ~ 35.3 V
输入电压: 3.7 V ~ 36 V
PWM 型: 电流模式
频率 - 开关: 920kHz ~ 1.06MHz
电流 - 输出: 1.4A
同步整流器:
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 管件
供应商设备封装: 16-TSSOP-EP
产品目录页面: 1331 (CN2011-ZH PDF)
LT3508
APPLICATIONS INFORMATION
is much lower than the switching frequency. A phase-lead
capacitor (C PL ) across the feedback divider may improve
the transient response.
LT3508
If an adjustable UVLO threshold is required, the SHDN
pin can be used. The threshold voltage of the SHDN pin
comparator is 2.63V. Current hysteresis is added above the
SHDN threshold. This can be used to set voltage hysteresis
of the UVLO using the following:
CURRENT MODE
POWER STAGE
g m = 2.5S
ERROR
AMPLIFIER
V SW
FB
R1
C PL
OUTPUT
R3 =
V H – V L
7.5μA
R4 =
V L – 2.63V
GND
V C
R C
2M
g m =
300μS
C F
0.8V
R2
ESR
+
C1
POLYMER
OR
TANTALUM
C1
CERAMIC
2.63V
– 8μA
R3
Example: switching should not start until the input is above
C C
3508 F06
4.75V and is to stop if the input falls below 4V.
V H = 4.75V, V L = 4.0V
Figure 6. Model for Loop Response
Shutdown and Undervoltage Lockout
R3 =
4.75V – 4V
7.5μA
= 100k
Figure 7 shows how to add undervoltage lockout (UVLO)
to the LT3508. Typically, UVLO is used in situations where
the input supply is current limited, or has a relatively high
source resistance. A switching regulator draws constant
R4 =
2.63V
4V – 2.63V
100k
– 8μA
= 461k
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
load to the source and can cause the source to current
limit or latch low under low source voltage conditions.
UVLO prevents the regulator from operating at source
voltages where the problems might occur.
An internal comparator will force the part into shutdown
below the minimum V IN1 of 3.7V. This feature can be used to
prevent excessive discharge of battery-operated systems.
Keep the connection from the resistor to the SHDN pin
short and make sure the interplane or surface capacitance
to switching nodes is minimized. If high resistor values are
used, the SHDN pin should be bypassed with a 1nF capaci-
tor to prevent coupling problems from the switch node.
Soft-Start
The output of the LT3508 regulates to the lowest voltage
present at either the TRACK/SS pin or an internal 0.8V
reference. A capacitor from the TRACK/SS pin to ground
V IN
R3
LT3508
SHDN
2.6V
V C
is charged by an internal 1.2μA current source resulting
in a linear output ramp from 0V to the regulated output
whose duration is given by:
C1
R4
TRACK/SS
t RAMP =
C SS ? 0.8V
1.2μA
8μA
7.5μA
At power up, internal open-collector outputs discharge
both TRACK/SS pins. The pins clamp at 1.3V.
3508 F07
Figure 7. Undervoltage Lockout
3508fd
15
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