参数资料
型号: LT3513EUHF#PBF
厂商: Linear Technology
文件页数: 19/22页
文件大小: 0K
描述: IC REG 5-OUT FOR TFT-LCD 38QFN
标准包装: 52
应用: 转换器,TFT,LCD
输入电压: 4.5 V ~ 30 V
输出数: 5
输出电压: 0.8 V ~ 40 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 38-WFQFN 裸露焊盘
供应商设备封装: 38-QFN(5x7)
包装: 管件
产品目录页面: 1332 (CN2011-ZH PDF)
LT3513
OPERATION
inverting regulators, the switched currents flow through
the power switch, the switching diode and the tank capaci-
tor. The loop formed by the components in the switched
current path should be as small as possible. Place these
components, along with the inductor and output capacitor,
on the same side of the circuit board, and connect them
on that layer. Place a local, unbroken ground plane below
these components, and tie this ground plane to system
ground at one location, ideally at the ground terminal of
the output capacitor C2. Additionally, keep the SW and
BOOST nodes as small as possible.
V IN SW
GND
(3a)
Thermal Considerations
The PCB must provide heat sinking to keep the LT3513
cool. The Exposed Pad on the bottom of the package must
be soldered to a ground plane. This ground should be tied
to other copper layers below with thermal vias; these lay-
ers will spread the heat dissipated by the LT3513. Place
additional vias near the catch diodes. Adding more copper
to the top and bottom layers and tying this copper to the
internal planes with vias can reduce thermal resistance
further. With these steps, the thermal resistance from die
(or junction) to ambient can be reduced to θ JA = 25°C
or less. With 100LFPM airflow, this resistance can fall
by another 25%. Further increases in airflow will lead to
lower thermal resistance.
V IN
GND
SW
(3b)
V SW
V IN
SW
L1
I C1
C1
GND
D1
C2
(3c)
3519 F03
Figure 3. Subtracting the Current When the Switch is On (3a)
from the Current When the Switch is Off (3b) Reveals the Path of
the High Frequency Switching Current (3c) Keep this Loop Small.
The Voltage on the SW and BOOST Nodes Will Also Be Switched;
Keep These Nodes as Small as Possible. Finally, Make Sure the
Circuit is Shielded with a Local Ground Plane
Figure 4. Topside PCB Layout
3513fc
19
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