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参数资料
| 型号： | LT3640EFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 20/24页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK FIX/ADJ DL 28TSSOP |
| 标准包装： | 50 |
| 类型： | 降压（降压） |
| 输出类型： | 两者兼有 |
| 输出数： | 2 |
| 输出电压： | 1.8V，3.3V，可调 |
| 输入电压： | 2.5 V ~ 35 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 500kHz ~ 2MHz |
| 电流 - 输出： | 1.1A，1.3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.173"，4.40mm 宽）裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 28-TSSOP 裸露焊盘 |
LT3640
APPLICATIONS INFORMATION
Figure 9a shows the power-on reset timing. Having FB1
or FB2 high starts the CPOR oscillator. After t RST , the cor-
responding RST is released. When both RST1 and RST2
are released, the CWDT oscillator starts. Figure 9b shows
the watchdog waveform with the WDI period between t WDL
and t WDU . The WDI falling edge resets the CWDT oscillator.
The CPOR oscillator is disabled and WDO remains high.
Figure 9c shows the watchdog waveform with the WDI
period longer than t WDU . WDO is asserted for a period of
t RST when the watchdog upper boundary, t WDU , expires.
PCB Layout
For proper operation and minimum EMI, care must be
taken during the printed circuit board (PCB) layout. Figure
10 shows the recommended component placement with
trace, ground plane and via locations. The input loop of
the high voltage channel, which is formed by the V IN
and SW1 pins, the external catch diode (D1), the input
capacitor (C IN ) and the ground, should be as small as
possible. These external components should be placed
C OUT2
on the same side of the circuit board as the LT3640, and
their connections should be made on that layer. Place a
local, unbroken ground plane below these components.
The BST and SW nodes should be as small as possible.
The boost capacitor (C BST ) should be as close to the BST
and SW pins as possible.
The input loop of the low voltage channel is formed by
the V IN2 pin, the input capacitor (C IN2 ) and the ground.
Place C IN2 close to the V IN2 and the GND pin to minimize
this loop. Place a local, unbroken ground plane below
this input loop.
Keep the FB1 and FB2 nodes small so that the ground
traces will shield them from the switching nodes. The
Exposed Pad on the bottom of the package must be sol-
dered to the ground so that the pad acts as a heat sink. To
keep thermal resistance low, extend the ground plane as
much as possible, and add thermal vias under and near
the LT3640 to additional ground planes within the circuit
board and on the bottom side.
L2
C IN2
C IN
C BST
L1
C OUT1
3640 F10
Figure 10. Recommended PCB Layout, FE28 Package
3640f
0
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LT3640EFETRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Dual Monolithic Buck Regulator with Power-On Reset and Watchdog Timer |
| LT3640EUFD | 制造商:LINER 制造商全称:Linear Technology 功能描述:Dual Monolithic Buck Regulator with Power-On Reset and Watchdog Timer |
| LT3640EUFD#PBF | 功能描述:IC REG BUCK FIX/ADJ DL 28QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LT3640EUFD#TRPBF | 功能描述:IC REG BUCK FIX/ADJ DL 28QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LT3640EUFDPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Dual Monolithic Buck Regulator with Power-On Reset and Watchdog Timer |
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