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参数资料
| 型号： | LT3652IMSE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/26页 |
| 文件大小： | 0K |
| 描述： | IC BATT CHARGER SOLAR 2A 12MSOP |
| 标准包装： | 37 |
| 功能： | 充电管理，太阳能 |
| 电池化学： | 铅酸，LiFePO4，锂离子，锂聚合物，镍镉，镍氢 |
| 电源电压： | 4.95 V ~ 32 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 12-TSSOP （0.118"，3.00mm 宽）裸露焊盘 |
| 供应商设备封装： | 12-MSOP，裸露焊盘 |
| 包装： | 管件 |
| 配用： | DC1568A-ND - BOARD BATTERY CHARGER SOLAR PWR |
LT3652
PIN FUNCTIONS
V IN (Pin 1): Charger Input Supply. V IN operating range
is 4.95V to 32V. V IN must be 3.3V greater than the pro-
grammed output battery ?oat voltage (V BAT(FLT) ) for reli-
able start-up. (V IN – V BAT(FLT) ) ≥ 0.75V is the minimum
operating voltage, provided (V BOOST – V SW ) ≥ 2V. I VIN ~
85μA after charge termination.
V IN_REG (Pin 2): Input Voltage Regulation Reference.
Maximum charge current is reduced when this pin is below
2.7V. Connecting a resistor divider from V IN to this pin
enables programming of minimum operational V IN voltage.
This is typically used to program the peak power voltage
for a solar panel. The LT3652 servos the maximum charge
current required to maintain the programmed operational
V IN voltage, through maintaining the voltage on V IN_REG
at or above 2.7V. If the voltage regulation feature is not
used, connect the pin to V IN .
SHDN (Pin 3): Precision Threshold Shutdown Pin. The
enable threshold is 1.2V (rising), with 120mV of input
hysteresis. When in shutdown mode, all charging functions
are disabled. The precision threshold allows use of the
SHDN pin to incorporate UVLO functions. If the SHDN pin
is pulled below 0.4V, the IC enters a low current shutdown
mode where V IN current is reduced to 15μA. Typical SHDN
pin input bias current is 10nA. If the shutdown function
is not desired, connect the pin to V IN .
CHRG (Pin 4): Open-Collector Charger Status Output;
typically pulled up through a resistor to a reference volt-
age. This status pin can be pulled up to voltages as high
as V IN when disabled, and can sink currents up to 10mA
when enabled. During a battery charging cycle, if required
charge current is greater than 1/10 of the programmed
maximum current (C/10), CHRG is pulled low. A tem-
perature fault also causes this pin to be pulled low. After
C/10 charge termination or, if the internal timer is used
for termination and charge current is less than C/10, the
CHRG pin remains high-impedance.
FAULT (Pin 5): Open-Collector Charger Status Output;
typically pulled up through a resistor to a reference volt-
age. This status pin can be pulled up to voltages as high
as V IN when disabled, and can sink currents up to 10mA
when enabled. This pin indicates fault conditions during a
battery charging cycle. A temperature fault causes this pin
to be pulled low. If the internal timer is used for termina-
tion, a bad battery fault also causes this pin to be pulled
low. If no fault conditions exist, the FAULT pin remains
high-impedance.
TIMER (Pin 6): End-Of-Cycle Timer Programming Pin.
If a timer-based charge termination is desired, connect
a capacitor from this pin to ground. Full charge end-of-
cycle time (in hours) is programmed with this capacitor
following the equation:
t EOC = C TIMER ? 4.4 ? 10 6
A bad battery fault is generated if the battery does not
achieve the precondition threshold voltage within one-
eighth of t EOC , or:
t PRE = C TIMER ? 5.5 ? 10 5
A 0.68μF capacitor is typically used, which generates a
timer EOC at three hours, and a precondition limit time of
22.5 minutes. If a timer-based termination is not desired,
the timer function is disabled by connecting the TIMER
pin to ground. With the timer function disabled, charging
terminates when the charge current drops below a C/10
threshold, or I CHG(MAX) /10
V FB (Pin 7): Battery Float Voltage Feedback Reference. The
charge function operates to achieve a ?nal ?oat voltage of
3.3V on this pin. Output battery ?oat voltage (V BAT(FLT) )
is programmed using a resistor divider. V BAT(FLT) can be
programmed up to 14.4V.
The auto-restart feature initiates a new charging cycle
when the voltage at the V FB pin falls 2.5% below the ?oat
voltage reference.
The V FB pin input bias current is 110nA. Using a resistor
divider with an equivalent input resistance at the V FB pin
of 250k compensates for input bias current error.
Required resistor values to program desired V BAT(FLT)
follow the equations:
R1 = (V BAT(FLT) ? 2.5 ? 10 5 )/3.3 (Ω)
R2 = (R1 ? 2.5 ? 10 5 )/(R1 - (2.5 ? 10 5 )) (Ω)
R1 is connected from BAT to V FB , and R2 is connected
from V FB to ground.
3652fd
7
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| LT3653EDCB#TRPBF | 功能描述:IC REG BUCK ADJ 1.2A 8DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
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