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参数资料
| 型号： | LT3688EFE#TRPBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING REGULATOR, PDSO24 |
| 封装： | LEAD FREE, PLASTIC, TSSOP-24 |
| 文件页数： | 15/28页 |
| 文件大小： | 415K |
| 代理商： | LT3688EFE#TRPBF |
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LT3688
22
3688f
If WDO is low and RST goes low, then WDO will go
high. The WDE pin allows the user to turn on and off the
watchdog function. Leaving this pin open is okay and
will automatically enable the watchdog. It has an internal
weak pull-down to ground. The WDI pin has an internal
weak pull-up that keeps the WDI pin high. If watchdog is
disabled, leaving this pin open is acceptable.
Conguration and Sequencing
Use the CONFIG pin to adjust the sequencing and the
behavior of the power-on reset and watchdog timers. The
table below shows all of the conguration options.
Table 5.
Conguration Options
CONFIG
CONDITION
HIGH
LOW OPEN
Channel 1 starts before Channel 2
××
Channel 1 and Channel 2 start simultaneously
×
Watchdog operates only if Reset 1 Expires
×
Watchdog operates only if Reset 1 and Reset
2 Expire
××
RST1 and RST2 high only if Timer 1 Expires
×
RST1 and RST2 use independent timers
××
Figure 9b. CONFIG = LOW
APPLICATIONS INFORMATION
Figure 9. Startup Waveforms with the
Three Conguration Settings
With the CONFIG pin tied high, VOUT1 will rise rst, as
shown in Figure 9a. After VOUT1 reaches VUV, VOUT2 will
start increasing. In addition, the reset timer for Channel 1
starts.OnceVOUT2reachesVUV,theresettimerforChannel2
starts. Once the reset timers for both Channel 1 and Channel
2 have expired, the Watchdog will start operation.
With the CONFIG pin tied low, VOUT1 will rise rst. After
VOUT1 reaches VUV, VOUT2 will start increasing. The reset
timer will only start if both VOUT1 and VOUT2 are above VUV,
as shown in Figure 9b. Once the reset timer programmed
by CPOR1 expires, both RST1 and RST2 can pull high,
and the Watchdog will start operation. In this mode, tie
CPOR2 to GND.
With the CONFIG pin open, VOUT1 and VOUT2 can rise
simultaneously, as shown in gure 9c. After VOUT1 reaches
VUV the reset timer for Channel 1 starts. Once VOUT2
reaches VUV, the reset timer for Channel 2 starts. Once
the reset timer for Channel 1 has expired, the Watchdog
will start operation.
Figure 9a. CONFIG = HIGH
Figure 9c. CONFIG = OPEN
VOUT1 (10V/DIV)
VOUT2 (10V/DIV)
RST1 (5V/DIV)
RST2 (5V/DIV)
WDO (5V/DIV)
WDI (10V/DIV)
10ms/DIV
3688 F09a
VOUT1 (10V/DIV)
VOUT2 (10V/DIV)
RST1 (5V/DIV)
RST2 (5V/DIV)
WDO (5V/DIV)
WDI (10V/DIV)
10ms/DIV
3688 F09b
VOUT1 (10V/DIV)
VOUT2 (10V/DIV)
RST1 (5V/DIV)
RST2 (5V/DIV)
WDO (5V/DIV)
WDI (10V/DIV)
10ms/DIV
3688 F09c
Selecting the Reset Timing Capacitors
The reset timeout period is adjustable in order to
accommodate a variety of microprocessor applications.
The reset timeout period, tRST, is adjusted by connecting
a capacitor, CPOR, between the CPOR pin and ground. The
value of this capacitor is determined by:
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