参数资料
型号: LT3689EUD#TRPBF
厂商: Linear Technology
文件页数: 14/34页
文件大小: 0K
描述: IC REG BUCK ADJ 0.7A 16QFN
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 34.2 V
输入电压: 3.6 V ~ 36 V
PWM 型: 电流模式,Burst Mode?
频率 - 开关: 500kHz ~ 2MHz
电流 - 输出: 700mA
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 16-QFN-EP(3x3)
LT3689/LT3689-5
APPLICATIONS INFORMATION
V IN(PS) =
– V D + V SW
V IN(PS) =
– 0.4V + 0.4V = 36V
V OUT + V D
V IN – V SW + V D
MaximumOperatingVoltage
The maximum input voltage for LT3689 applications
depends on switching frequency, the absolute maximum
ratings of the V IN and BST pins, and by the minimum
duty cycle (DC MIN ). The LT3689 can operate from input
voltages up to 36V, and safely withstand input transient
voltages up to 60V. Note that while V IN > 38V (typical),
the LT3689 will stop switching, allowing the output to fall
out of regulation.
DC MIN = t ON(MIN) ? f SW
where t ON(MIN) is equal to 130ns (for T J > 125°C t ON(MIN)
is equal to 150ns) and f SW is the switching frequency.
Running at a lower switching frequency allows a lower
minimum duty cycle. The maximum input voltage before
pulse-skipping occurs depends on the output voltage and
the minimum duty cycle:
V OUT + V D
DC MIN
Example: f SW = 790kHz, V OUT = 3.3V,
DC MIN = 130ns ? 790kHz = 0.103
3.3V + 0.4V
0.103
The LT3689 will regulate the output current at input volt-
ages greater than V IN(PS) . For example, an application
V OUT
50mV/DIV
(AC)
I L
0.5A/DIV
with an output voltage of 1.8V and switching frequency
of 1.5MHz has a V IN(PS) of 11.3V, as shown in Figure 1.
Figure 2 shows operation at 24V. Output ripple and peak
inductor current have significantly increased. A saturating
inductor may further reduce performance. For input volt-
ages over 30V, there are restrictions on the inductor size
and saturation rating. See the Inductor Selection section
for more details. In pulse-skipping mode, the LT3689 skips
switching pulses to maintain output regulation. Above 38V
(typical) switching will stop. Transients of up to 60V are
acceptable, regardless of switching frequency.
Minimum Operating Voltage Range
The minimum input voltage is determined either by the
LT3689’s minimum operating voltage of ~3.4V or by its
maximum duty cycle. The duty cycle is the fraction of
time that the internal switch is on and is determined by
the input and output voltages:
DC =
Unlike many fixed frequency regulators, the LT3689 can
extend its duty cycle by remaining on for multiple cycles.
The LT3689 will not switch off at the end of each clock cycle
if there is sufficient voltage across the boost capacitor (C3
in the Block Diagram). Eventually, the voltage on the boost
capacitor falls and requires refreshing. Circuitry detects
V OUT
50mV/DIV
(AC)
I L
0.5A/DIV
5μs/DIV
3689 F01
5μs/DIV
3689 F02
Figure 1. Operation Below V IN(PS) . V IN = 10V,
V OUT = 1.8V and f SW = 1.5MHz
Figure 2. Operation Above V IN(PS) . V IN = 24V,
V OUT = 1.8V and f SW = 1.5MHz. Output Ripple
and Peak Inductor Current Increase
3689fe
14
For more information www.linear.com/LT3689
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