参数资料
型号: LT3689IUD-5#TRPBF
厂商: Linear Technology
文件页数: 24/34页
文件大小: 0K
描述: IC REG BUCK 5V 0.7A 16QFN
标准包装: 2,500
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 5V
输入电压: 3.6 V ~ 36 V
PWM 型: 电流模式,Burst Mode?
频率 - 开关: 500kHz ~ 2MHz
电流 - 输出: 700mA
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 16-QFN-EP(3x3)
LT3689/LT3689-5
APPLICATIONS INFORMATION
C POR = t RST ? 432
Inbothwatchdogmodes,whenWDOisasserted,thereset
timer is enabled. Any WDI pulses that appear while the
reset timer is running are ignored. When the reset timer
expires, the WDO is allowed to go high again. Therefore,
if no input is applied to the WDI pin, then the watchdog
circuitry produces a train of pulses on the WDO pin. The
high time of this pulse train is equal to the timeout period,
and low time is equal to the reset period. Also, WDO and
RST cannot be logic low simultaneously. If WDO is low
and RST goes low, then WDO will go high.
The WDE pin allows the user to turn on and off the watch-
dog function. Do not leave this pin open. Tie it high or
low to turn watchdog off or on, respectively. The W /T pin
enables/disables the window/timeout mode. Leaving this
pin open is fine and will put the watchdog in window mode.
It has a weak pull-down to ground. The WDI pin has an
internal 2μA weak pull-up that keeps the WDI pin high. If
watchdog is disabled, leaving this pin open is acceptable.
Selecting the Reset Timing Capacitors
The reset timeout period is adjustable in order to accom-
modate a variety of microprocessor applications. The
reset timeout period, (t RST ), is adjusted by connecting a
capacitor, C POR , between the C POR pin and ground. The
value of this capacitor is determined by:
pF
ms
This equation is accurate for reset timeout periods of
5ms, or greater. To program faster timeout periods, see
the Reset Timeout Period vs Capacitance graph in the
Typical Performance Characteristics section. Leaving the
C POR pin unconnected will generate a minimum reset
timeout of approximately 25μs. Maximum reset timeout
is limited by the largest available low leakage capacitor.
The accuracy of the timeout period will be affected by
V OUT
2V/DIV
RST
2V/DIV
WDI
5V/DIV
WDO
2V/DIV
C WDT
1V/DIV
C WDT = 10nF, t WDL = 5.8ms
C POR
1V/DIV
t RST = 165ms
C POR = 71nF
C POR
1V/DIV
50ms/DIV
3689 F10
5ms/DIV
3689 F11
Figure 10. Reset Timer Waveforms
WDI
5V/DIV
WDO
2V/DIV
C WDT
1V/DIV
C POR
1V/DIV
Figure 11. Window Watchdog Waveforms ( W /T = Low)
t RST = 165ms, C POR = 71nF
t WDU = 180ms, C WDT = 10n F
100ms/DIV
3689 F12
Figure 12. Timeout Watchdog Waveforms ( W /T = High)
3689fe
24
For more information www.linear.com/LT3689
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