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| 型号： | LT3690MPUFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 22/30页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 26QFN |
| 标准包装： | 61 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 20 V |
| 输入电压： | 3.9 V ~ 36 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 138kHz ~ 1.5MHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -55°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 26-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 26-QFN-EP（4x6） |
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LT3690
APPLICATIONS INFORMATION
L MIN = ( V OUT + V LS ) ?
OutputTrackingandSequencing
Output tracking and sequencing between voltage regu-
lators can be implemented using the LT3690’s SS and
PG pins. Figures 8 and 9 show several configurations
for output tracking and sequencing of the LT3690 and
an additional regulator. Independent soft-start for each
channel is shown in Figure 8a. The output ramp time for
each output is set by the soft-start capacitor as described
in the soft-start section.
Ratiometric tracking is achieved in Figure 8b by connecting
SS pins of two regulators together. In this configuration,
the SS pin current is set by the sum of the SS pin currents
of the two regulators, which must be taken into account
when calculating the output rise time.
By connecting a feedback network from OUT1 to the
SS pin with the same ratio that set the OUT2 voltage,
absolute tracking shown in Figure 9a is implemented. A
small OUT2 voltage offset will be present due to the SS
pin’s 2μA source current. This offset can be corrected by
slightly reducing the value of R2.
Figure 9b illustrates output sequencing. When V OUT1 is
within 10% of its regulated voltage, PG releases the SS
soft-start pin, allowing V OUT2 to soft-start.
Synchronization
To select low-ripple Burst Mode operation, tie the SYNC
pin below 0.4V (this can be ground or a logic output).
Synchronize the LT3690 oscillator to an external frequency
by connecting a square wave (with positive and negative
pulse width > 100ns) to the SYNC pin. The square wave
amplitude should have valleys that are below 0.4V and
peaks that are above 1V (up to 6V).
To assure reliable and safe operation, the LT3690 will
synchronize when the output voltage is above 90% of its
regulated voltage. It is therefore necessary to choose a
large enough inductor value to supply the required output
current at the frequency set by the R T resistor (see the
Inductor Selection section). It is also important to note
that slope compensation is set by the R T value. When the
synchronization frequency is much higher than the one
set by R T , the slope compensation is significantly reduced,
which may require a larger inductor value to prevent sub-
harmonic oscillation.
For duty cycles greater than 50% (V OUT /V IN > 0.5), a
minimum inductance is required to avoid sub-harmonic
oscillations:
0.42MHz
? SW
where V LS is the voltage drop of the low side switch
(0.12V at maximum load), ? SW is in MHz, and L MIN is in
μH. For ? SW in the above calculation, use the frequency
programmed by R T , not the synchronization frequency.
Undervoltage Lockout
Figure 10 shows how to add undervoltage lockout (UVLO)
to the LT3690. Typically, UVLO is used in situations where
the input supply is current limited, or has a relatively high
source resistance. A switching regulator draws constant
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
load to the source and can cause the source to current
V IN
V IN LT3690
The LT3690 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will skip pulses to maintain regulation.
R3
UVLO
2μA
C4
R4
The LT3690 may be synchronized over a 170kHz to
1.5MHz range. The R T resistor should be chosen to set
the LT3690 switching frequency 20% below the lowest
synchronization input. For example, if the synchronization
signal will be 350kHz and higher, choose R T for 280kHz.
1.25V SLEEP
3690 F10
Figure 10. Undervoltage Lockout
3690fa
22
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| LT3692AEFE#PBF | 功能描述:IC REG BUCK ADJ 3.5A DL 38TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LT3692AEFE#TRPBF | 功能描述:IC REG BUCK ADJ 3.5A DL 38TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
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