参数资料
型号: LT3690MPUFE#PBF
厂商: Linear Technology
文件页数: 23/30页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 4A 26QFN
标准包装: 61
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 20 V
输入电压: 3.9 V ~ 36 V
PWM 型: 电流模式,混合
频率 - 开关: 138kHz ~ 1.5MHz
电流 - 输出: 4A
同步整流器:
工作温度: -55°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 26-WFQFN 裸露焊盘
包装: 管件
供应商设备封装: 26-QFN-EP(4x6)
LT3690
APPLICATIONS INFORMATION
R3 = H
R4 = R3 ?
V H
R3 =
= 200k ?
R4 = 200k ? ?
= 79.4k ?
? 1
limit or latch low under low source voltage conditions.
The UVLO circuitry prevents the regulator from operating
at source voltages where the problems might occur. An
internal comparator will force the part into shutdown below
the fixed V IN UVLO threshold of 3.0V. This feature can be
used to prevent excessive discharge of battery-operated
systems. If an adjustable UVLO threshold is required, the
UVLO pin can be used. The threshold voltage of the UVLO
pin comparator is 1.25V. Current hysteresis is added
above the UVLO threshold. This can be used to set volt-
age hysteresis of the UVLO using the following equations:
V ? V L
2μA
1
? 1
1.25V
Example: switching should not start until the input is above
4.4V, and is to stop if the input falls below 4V.
4.4V ? 4.0V
2μA
1
4.4V
1.25V
Keep the connection from the resistor to the UVLO pin
short and minimize the interplane or surface capacitance
to switching nodes. If high resistor values are used, the
UVLO pin should be bypassed with a 1nF capacitor to
prevent coupling problems from the switch node.
Shorted and Reversed Input Protection
If the inductor is chosen to prevent excessive saturation,
the LT3690 will tolerate a shorted output. When operat-
ing in short-circuit condition, the LT3690 will reduce its
frequency until the valley current is at a typical value of 5A
(see Figure 11). There is another situation to consider in
systems where the output is held high when the input to
the LT3690 is absent. This may occur in battery charging
applications or in battery backup systems where a battery
or some other supply is diode ORed with the LT3690’s
output. If the V IN pin is allowed to float and the EN pin
is held high (either by a logic signal or because it is tied
to V IN ), then the LT3690’s internal circuitry will pull its
quiescent current through its SW pin. This is acceptable
if the system can tolerate a few mA in this state. If the EN
pin is grounded, the SW pin current will drop to essentially
zero. However, if the V IN pin is grounded while the output
is held high, then parasitic diodes inside the LT3690 can
pull large currents from the output through the SW pin
and the V IN pin. Figure 12 shows a circuit that will run
only when the input voltage is present and that protects
against a shorted or reversed input.
D4
MBRS540
V IN
V SW
10V/DIV
V IN
UVLO
BIAS
BST
V OUT
0V
LT3690
SW
I L1
2A/DIV
EN
GND
FB
BACKUP
3690 F12
2μs/DIV
3690 F11
Figure 11. The LT3690 Reduces its Frequency to Below
250kHz to Protect Against Shorted Output with 36V Input
Figure 12. Diode D4 Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output; It Also
Protects the Circuit from a Reversed Input. The LT3690
Runs Only When the Input Is Present
3690fa
23
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