参数资料
型号: LT3724EFE#PBF
厂商: Linear Technology
文件页数: 14/26页
文件大小: 0K
描述: IC REG CTRLR BST INV PWM 16TSSOP
标准包装: 95
PWM 型: 电流模式
输出数: 1
频率 - 最大: 225kHz
占空比: 100%
电源电压: 4 V ~ 60 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 管件
产品目录页面: 1332 (CN2011-ZH PDF)
LT3724
APPLICATIONS INFORMATION
? V OUT = ? I L ? ? ESR +
C IN(BULK) =
I CIN(RMS) = I OUT
( ? V OUT )(L)(f SW )
?
V OUT ?
V IN(MAX) ?
V OUT ? ? 1– ?
R2 = R1 ?
– 1 ?
R2 = 10k ? ?
? 1 ? = 87.48k ? ? use 86.6k ? 1%
Step-DownConverter:InputCapacitorSelection
A local input bypass capacitor is required for buck convert-
ers because the input current is pulsed with fast rise and
fall times. The input capacitor selection criteria are based
on the bulk capacitance and RMS current capability. The
bulk capacitance will determine the supply input ripple
voltage. The RMS current capability is used to keep from
overheating the capacitor.
The bulk capacitance is calculated based on maximum
input ripple, ?V IN :
I OUT(MAX) ? V OUT
? V IN ? f SW ? V IN(MIN)
?V IN is typically chosen at a level acceptable to the user.
100mV-200mV is a good starting point. Aluminum elec-
trolytic capacitors are a good choice for high voltage, bulk
capacitance due to their high capacitance per unit area.
The capacitor’s RMS current is:
V OUT (V IN – V OUT )
(V IN ) 2
If applicable, calculate it at the worst case condition,
V IN = 2V OUT . The RMS current rating of the capacitor
is specified by the manufacturer and should exceed the
calculated I CIN(RMS) . Due to their low ESR (Equivalent
Series Resistance), ceramic capacitors are a good choice
for high voltage, high RMS current handling. Note that the
ripple current ratings from aluminum electrolytic capacitor
manufacturers are based on 2000 hours of life. This makes
it advisable to further derate the capacitor or to choose a
capacitor rated at a higher temperature than required.
The combination of aluminum electrolytic capacitors and
ceramic capacitors is an economical approach to meet-
ing the input capacitor requirements. The capacitor volt-
age rating must be rated greater than V IN(MAX) . Multiple
capacitors may also be paralleled to meet size or height
requirements in the design. Locate the capacitor very close
to the MOSFET switch and use short, wide PCB traces to
minimize parasitic inductance.
Step-Down Converter: Output Capacitor Selection
The output capacitance, C OUT , selection is based on the
design’s output voltage ripple, ?V OUT , and transient load
requirements. ?V OUT is a function of ?I L and the C OUT
ESR. It is calculated by:
? 1 ?
?
? (8 ? f SW ? C OUT ) ?
The maximum ESR required to meet a ?V OUT design
requirement can be calculated by:
ESR(MAX) =
?
Worst-case ?V OUT occurs at highest input voltage. Use
paralleled multiple capacitors to meet the ESR require-
ments. Increasing the inductance is an option to lower the
ESR requirements. For extremely low ?V OUT , an additional
LC filter stage can be added to the output of the supply.
Application Note 44 has some good tips on sizing an ad-
ditional output filter.
Output Voltage Programming
A resistive divider sets the DC output voltage according
to the following formula:
? V OUT ?
? 1.231V ?
The external resistor divider is connected to the output
of the converter as shown in Figure 2. Tolerance of the
feedback resistors will add additional error to the output
voltage.
Example: V OUT = 12V; R1 = 10kΩ
? 12V ?
? 1.231V ?
3724fd
14
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