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| 型号： | LT3740EDHC#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 16-DFN |
| 标准包装： | 73 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 330kHz |
| 占空比： | 90% |
| 电源电压： | 2.2 V ~ 22 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-WFDFN 裸露焊盘 |
| 包装： | 管件 |
| 产品目录页面： | 1332 (CN2011-ZH PDF) |
LT3740
APPLICATIONS INFORMATION
Once the value for L is known, the type of inductor must
be selected. High ef?ciency converters generally cannot
afford the core loss found in low cost powdered iron cores;
instead use ferrite, molypermalloy or Kool Mμ ? cores. A
variety of inductors designed for high current, low voltage
applications are available from manufacturers such as
Sumida, Panasonic, Coiltronics, Coilcraft and Toko.
Schottky Diode D1 Selection
This simple worst-case condition is commonly used for
design because even signi?cant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based on only 2000 hours of life
which makes it advisable to derate the capacitor.
The selection of C OUT is primarily determined by the ESR
required to minimize voltage ripple and load step transients.
The output ripple Δ V OUT is approximately bounded by:
Δ V OUT < Δ l L ? ? ESR +
The Schottky diode D1 shown in Figure 4 conducts dur-
ing the dead time between the conduction of the power
?
?
1 ?
8 ?F S ? C OUT ? ?
MOSFET switches. It is intended to prevent the body diode
of the bottom MOSFET from turning on and storing charge
during the dead time, which can cause a modest (about
1%) ef?ciency loss. The diode can be rated for about one
half of the full load current since it is on for only a fraction
of the duty cycle. In order for the diode to be effective, the
inductance between it and the bottom MOSFET must be
as small as possible, mandating that these components
be placed adjacently. Another important bene?t of the
Schottky diode is that it reduces the SW node ringing at
switching edges, which reduces the noise in the circuit
and also makes the MOSFETs more reliable.
C IN and C OUT Selection
The input capacitance C IN is required to ?lter the square
wave current at the drain of the top MOSFET. Use a low ESR
capacitor sized to handle the maximum RMS current.
Since Δ I L increases with input voltage, the output ripple
is highest at maximum input voltage. Typically, once the
ESR requirement is satis?ed, the capacitance is adequate
for ?ltering and has the necessary RMS current rating.
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic
and ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important to only use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have signi?cantly higher ESR, but
can be used in cost-sensitive applications providing that
consideration is given to ripple current ratings and long
term reliability. Ceramic capacitors have excellent low ESR
I RMS ≈ I OUT(MAX) ?
V OUT
V IN
?
V IN
V OUT
? 1
characteristics but can have a high voltage coef?cient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to signi?cant
I RMS = ?I OUT(MAX)
This formula has a maximum at V IN = 2V OUT , where:
1
2
ringing. When used as input capacitors, care must be taken
to ensure that ringing from inrush currents and switching
does not pose an overvoltage hazard to the power switches
and controller. To dampen input voltage transients, add
a small 5μF to 50μF aluminum electrolytic capacitor with
an ESR in the range of 0.5Ω to 2Ω.
3740fc
11
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