参数资料
型号: LT3740EDHC#TRPBF
厂商: Linear Technology
文件页数: 12/20页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 16-DFN
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 330kHz
占空比: 90%
电源电压: 2.2 V ~ 22 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-WFDFN 裸露焊盘
包装: 带卷 (TR)
LT3740
APPLICATIONS INFORMATION
I LIMIT =
V SN(MAX) Δ I L
R S
Current Limit
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage.
In the LT3740, the maximum sense voltage is selected by
the RANGE pin. With valley current control, the maximum
sense voltage and the sense resistance determine the maxi-
mum allowed inductor valley current. The corresponding
output current limit is:
+
2
The current limit value should be checked to ensure that
I LIMIT(MIN) > I OUT(MAX) . The maximum sense voltage in-
creases as duty cycle decreases. If MOSFET on-resistance
is used for current sensing, it is important to check for
self-consistency between the assumed MOSFET junction
temperature and the resulting value of I LIMIT which heats
the MOSFET switches.
In the event of output short-circuit to ground, the LT3740
operates at maximum inductor current and minimum duty
cycle. The actual inductor discharging voltage is the voltage
drop on the parasitic resistors including bottom MOSFET
on-resistance, inductor ESR, external sensing resistor if it
is used and the actual short-circuit load resistance. Because
of the big variation of these parasitic resistances, the top
MOSFET on-time can vary considerably for the same input
voltage. In the case of high input voltage and low parasitic
resistance, pulse-skipping may happen.
Ef?ciency Considerations
The percent ef?ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the ef?ciency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LT3740 circuits:
1. DC I 2 R losses. These arise from the on-resistances of
the MOSFETs, external sensing resistor, inductor and
PC board traces and cause the ef?ciency to drop at high
output currents. The average output current ?ows through
the inductor, but is chopped between the top and bottom
MOSFETs. If the two MOSFETs have approximately the
same R DS(ON) , then the resistance of one MOSFET can
simply be summed with the resistances of L and the board
traces to obtain the DC I 2 R loss. For example, if R DS(ON) =
0.01Ω and R L = 0.005Ω, the loss will range from 15mW
to 1.5W as the output current varies from 1A to 10A.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the
input voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is signi?cant
at high input voltages and can be estimated from:
Transition Loss = (1.7A –1 ) ? V IN2 ? I OUT ? C RSS ? F S
3. Gate drive loss. The previous formula show the factors
of this loss. For the top MOSFET, nothing can be done
other than choosing a small C GS MOSFET without
sacri?cing on-resistance. For the bottom MOSFET,
the gate drive loss can be reduced by choose the right
BGDP voltage supply.
4. C IN loss. The input capacitor has the dif?cult job of ?ltering
the large RMS input current to the regulator. It must have
a very low ESR to minimize the AC I 2 R loss and suf?cient
capacitance to prevent the RMS current from causing
additional upstream losses in fuses or batteries.
Other losses, including C OUT ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve ef?ciency, the input
current is the best indicator of changes in ef?ciency. If a
change is made and the input current decreases, then the
ef?ciency has increased. If there is no change in input
current, then there is no change in ef?ciency.
3740fc
12
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