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参数资料
| 型号： | LT3742EUF#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 24-QFN |
| 标准包装： | 2,500 |
| 系列： | PolyPhase® |
| PWM 型： | 电流模式 |
| 输出数： | 2 |
| 频率 - 最大： | 560kHz |
| 占空比： | 100% |
| 电源电压： | 4 V ~ 30 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
LT3742
APPLICATIONS INFORMATION
characteristic to notice about this method is that if the
output of controller 1 goes out of regulation enough
to trip the power good comparator, controller 2 will be
disabled.
In Figure 2b, a slightly larger capacitor on RUN/SS2 delays
the turn-on of controller 2 with respect to controller 1. The
start-up waveforms for this method look very similar to
the one shown in Figure 6a, but here controller 2 is not
disabled if controller 1 goes out of regulation.
tie it to V IN if not used. A separate, less accurate, internal
undervoltage lockout will disable the LT3742 when V IN is
less than 2.5V.
The UVLO resistor values are chosen to give the desired
minimum operating voltage (V IN(MIN) ) and the desired
amount of hysteresis (V HYST ). The LT3742 will turn on
when the input voltage is above (V IN(MIN) + V HYST ), and
once on, will turn off when V IN drops below V IN(MIN) . Select
the value for R UV1 first, then select the value for R UV2 .
V HYST
R UV1 =
InFigure2c,bothRUN/SSpinsshareasinglecapacitor
and start up at the same time. By sharing the same soft-
start signal, this method provides ratiometric tracking of
the two outputs.
Undervoltage Lockout (UVLO)
3μA
R UV2 = R UV1 ?
1.25V
V IN(MIN) – 1.25V
DC = ?
? V IN – V DS + V D ?
An external resistor divider can be used to accurately
set the minimum input voltage at which the LT3742 will
operate. Figure 3 shows the basic UVLO operation. Once
the UVLO pin drops below 1.25V, an undervoltage lock-
out event is signaled, turning on a 3μA current source to
provide hysteresis.
During a UVLO event, both controllers and the gate drive
boost regulator are disabled. For the LT3742, all RUN/SS
pins are discharged to get ready for a new soft-start cycle.
For each controller that is enabled, it’s RUN/SS pin will
be held to 500mV until the input voltage rises above the
upper UVLO trip voltage. The UVLO function is only active
when one or more of the controllers are enabled using the
RUN/SS pin. The UVLO pin can not be used to directly
start the part. Do not leave the UVLO pin unconnected;
Input Voltage Range
The minimum input voltage is determined by either the
LT3742’s minimum operating voltage of 4V, UVLO or by
the output voltages of a given application. The LT3742 can
operate at 100% duty cycle, so if the input voltage drops
close to or equal to one of the output voltages, the control-
ler will go into low dropout operation (100% duty cycle).
The duty cycle is the fraction of the time the N-channel
MOSFET is on every switch cycle, and is determined by
the input and output voltages:
? V OUT + V D ?
?
where V D is the forward drop of the catch diode (~0.4V)
and V DS is the typical MOSFET voltage drop (~0.1V).
V IN
V IN
2
1.25V
+
R UV1
UVLO
3
–
UVLO
R UV2
3μA
Figure 3. Undervoltage Lockout
3742 F03
3742fa
11
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