参数资料
型号: LT3781IG#TRPBF
厂商: Linear Technology
文件页数: 7/20页
文件大小: 0K
描述: IC REG CTRLR ISO PWM CM 20-SSOP
标准包装: 1,800
PWM 型: 电流模式
输出数: 2
频率 - 最大: 700kHz
占空比: 100%
电源电压: 8 V ~ 72 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
包装: 带卷 (TR)
LT3781
PI FU CTIO S
The LT3781 oscillator operates by monitoring the voltage
on C FSET as it is charged via R FSET . When the voltage on the
FSET pin reaches 2.5V, the oscillator rapidly discharges
the capacitor with an average current of about 0.8mA.
Once the voltage on the pin is reduced to 1.5V, the pin
becomes high-impedance and the charging cycle repeats.
The oscillator operates at twice the switching frequency of
the controller.
Oscillator frequency f OSC can be approximated by the
relation:
SS (Pin 8): Soft-Start. Connect a capacitor (C SS ) from this
pin to ground.
The output voltage of the LT3781 error amplifier corre-
sponds to the peak current sense amplifier output de-
tected before resetting the switch outputs. The soft-start
circuit forces the error amplifier output to a zero sense
current for start-up. A 10 μ A current is forced from this pin
onto an external capacitor. As the SS pin voltage ramps up,
so does the LT3781 internally sensed current limit. This
effectively forces the internal current limit to ramp from
zero, allowing overall converter current to slowly increase
? R
?
?
? ? 0 . 5 ? 10 – 6 + C FSET ? FSET + ? 8 ? 10 – 4 +
? ?
?
2 ? ? ?
R FSET ? ? ?
f OSC
?
? 3 ?
– 1 ?
? ? ?
? ?
– 1
until normal output regulation is achieved. This function
reduces output overshoot on converter start-up. The soft-
start functions incorporate a 1V BE “dead zone” such that
SYNC (Pin 7): Oscillator Synchronization Input Pin with
TTL-Level Compatible Input. The SYNC input signal (at the
desired synchronized operating frequency) controls both
the internal oscillator (running at twice the SYNC fre-
quency) and the output switch phase. If synchronization
function is not desired, this pin may be floated or shorted
to ground.
The LT3781 internal oscillator drives a toggle flip-flop that
assures a ≤ 50% duty-cycle condition during oscillator
free-run. The oscillator, therefore, runs at twice the oper-
ating frequency of the controller. The SYNC input decoder
incorporates a frequency doubling circuit for oscillator
synchronization, resetting the internal oscillator on both
the rising and falling edges of the input signal.
The SYNC input decoder also differentiates transition
phase and forces the toggle flip-flop to phase-lock with the
SYNC input. A transition to logic high on the SYNC input
signal corresponds to the initiation of a new switching
cycle (primary switches turning on pending current con-
trol) and a transition to logic low forces a primary switch
off state. As such, the maximum operating duty cycle is
equal to the duty cycle of the SYNC signal. The SYNC input
can therefore be used to reduce the maximum duty cycle
of the controller by reducing the duty cycle of the SYNC
input.
a zero-current condition is maintained on the V C pin until
the SS pin rises to 1V BE above ground.
The SS pin voltage is reset to start-up condition during
shutdown, undervoltage lockout, and overvoltage or
overcurrent events, yielding a graceful converter output
recovery from these events.
V FB (Pin 9): Error Amplifier Inverting Input. Typically
connected to a resistor divider from the output and com-
pensation components to the V C pin.
The V FB pin is the converter output voltage feedback node.
Input bias current of ~50nA forces pin high in the event of
an open feedback path condition. The error amplifier is
internally referenced to 1.25V.
Values for the V OUT to V FB feedback resistor (RFB1) and
the V FB to ground resistor (RFB2) can be calculated to
program converter output voltage (V OUT ) via the following
relation:
V OUT = 1.25 ? (RFB1 + RFB2)/RFB2
V C (Pin 10): Error Amplifier Output. The LT3781 error
amplifier is a low impedance output inverting gain stage.
The amplifier has ample current source capability to allow
easy integration of isolation optocouplers that require bias
currents up to 10mA. External DC loading of the V C pin
reduces the external current sourcing capacity of the
5V REF pin by the same amount as the load on the V C pin.
3781f
7
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