- 您现在的位置：买卖IC网 > PDF目录14819 > LT3991EMSE-5#PBF (Linear Technology)IC REG BUCK 5V 1.2A 10-MSOP PDF资料下载
参数资料
| 型号： | LT3991EMSE-5#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 17/24页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK 5V 1.2A 10-MSOP |
| 标准包装： | 50 |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 5V |
| 输入电压： | 4.3 V ~ 55 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 200kHz ~ 2MHz |
| 电流 - 输出： | 1.2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 10-MSOP 裸露焊盘 |
LT3991/LT3991-3.3/LT3991-5
APPLICATIONS INFORMATION
2ms/DIV
17
Soft-Start
The SS pin can be used to soft-start the LT3991 by throttling
the maximum input current during start-up. An internal 1μA
current source charges an external capacitor generating a
voltage ramp on the SS pin. The SS pin clamps the internal
V C node, which slowly ramps up the current limit. Maximum
current limit is reached when the SS pin is about 1.5V or
higher. By selecting a large enough capacitor, the output
can reach regulation without overshoot. A 100k resistor
in series with the soft-start capacitor is recommended.
Figure 7 shows start-up waveforms for a typical application
with a 10nF capacitor and a 100k resistor on SS for a 3.3?
load when the EN pin is pulsed high for 10ms.
The external SS capacitor is only actively discharged when
EN is low. With EN low, the external SS cap is discharged
through approximately 150?. The EN pin needs to be low
long enough for the external cap to completely discharge
through the 150? pull-down and external series resistor
prior to start-up.
V SS
0.5V/DIV
V OUT
2V/DIV
I L
0.5A/DIV
3991 F07
Figure 7. Soft-Start Waveforms for Front-Page Application
with 10nF Capacitor and 100k Series Resistor on SS.
EN is Pulsed High for About 10ms with a 3.3? Load Resistor
Synchronization
To select low ripple Burst Mode operation, tie the SYNC pin
below 0.6V (this can be ground or a logic low output).
Synchronizing the LT3991 oscillator to an external fre-
quency can be done by connecting a square wave (with
20% to 80% duty cycle) to the SYNC pin. The square
wave amplitude should have valleys that are below 0.6V
and peaks above 1.0V (up to 6V).
The LT3991 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will pulse skip to maintain regulation.
The LT3991 may be synchronized over a 250kHz to 2MHz
range. The R T resistor should be chosen to set the LT3991
switching frequency 20% below the lowest synchronization
input. For example, if the synchronization signal will be
250kHz and higher, the R T should be selected for 200kHz.
To assure reliable and safe operation the LT3991 will only
synchronize when the output voltage is near regulation as
indicated by the PG flag. It is therefore necessary to choose
a large enough inductor value to supply the required output
current at the frequency set by the R T resistor (see the
Inductor Selection section). The slope compensation is set
by the R T value, while the minimum slope compensation
required to avoid subharmonic oscillations is established
by the inductor size, input voltage, and output voltage.
Since the synchronization frequency will not change the
slopes of the inductor current waveform, if the inductor
is large enough to avoid subharmonic oscillations at the
frequency set by R T , than the slope compensation will be
sufficient for all synchronization frequencies.
Shorted and Reversed Input Protection
If the inductor is chosen so that it won’t saturate exces-
sively, an LT3991 buck regulator will tolerate a shorted
output. There is another situation to consider in systems
where the output will be held high when the input to the
LT3991 is absent. This may occur in battery charging ap-
plications or in battery backup systems where a battery
or some other supply is diode ORed with the LT3991’s
output. If the V IN pin is allowed to float and the EN pin
is held high (either by a logic signal or because it is tied
to V IN ), then the LT3991’s internal circuitry will pull its
quiescent current through its SW pin. This is fine if your
system can tolerate a few μA in this state. If you ground
the EN pin, the SW pin current will drop to essentially
zero. However, if the V IN pin is grounded while the output
is held high, regardless of EN, parasitic diodes inside the
LT3991 can pull current from the output through the SW
pin and the V IN pin. Figure 8 shows a circuit that will run
only when the input voltage is present and that protects
against a shorted or reversed input.
3991fa
相关PDF资料 |
PDF描述 |
|---|---|
| VI-JVN-EY-F3 | CONVERTER MOD DC/DC 18.5V 50W |
| LT3511EMS#PBF | IC REG FLYBACK ISOLATD 16-MSOP |
| LT3991EMSE-3.3#PBF | IC REG BUCK 3.3V 1.2A 10-MSOP |
| LT3509EDE#PBF | IC REG BUCK ADJ 0.7A DL 14DFN |
| VI-JVN-EY-F2 | CONVERTER MOD DC/DC 18.5V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LT3991EMSEPBF | 制造商:Linear Technology 功能描述:DC-DC Converter Step-Down 4.3-55V MSOP10 |
| LT3991EMSETRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:55V, 1.2A Step-Down Regulator with 2.8 Quiescent Current |
| LT3991IDD#PBF | 功能描述:IC REG BUCK ADJ 1.2A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:MIC23xxx HyperLight Load™ Regulators 标准包装:5,000 系列:HyperLight Load® 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.8V 输入电压:2.7 V ~ 5.5 V PWM 型:混合物 频率 - 开关:4MHz 电流 - 输出:2A 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-VFDFN 裸露焊盘，8-MLF? 包装:带卷 (TR) 供应商设备封装:8-MLF?（2x2） 产品目录页面:1094 (CN2011-ZH PDF) 其它名称:576-3303-2 |
| LT3991IDD#TRPBF | 功能描述:IC REG BUCK ADJ 1.2A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LT3991IDDPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:55V, 1.2A Step-Down Regulator with 2.8 Quiescent Current |
发布紧急采购，3分钟左右您将得到回复。