参数资料
型号: LT4356CDE-1#PBF
厂商: Linear Technology
文件页数: 14/26页
文件大小: 0K
描述: IC OVERVOLT PROT REG 12-DFN
产品培训模块: LT4356 Surge Stopper
产品目录绘图: LT4356 Output Graph
LT4356 Series 12-DFN
标准包装: 91
电压 - 工作: 4 ~ 80V
电压 - 箝位: 27V,可调
技术: 混合技术
电路数: 1
应用: 自动
封装/外壳: 12-WFDFN 裸露焊盘
供应商设备封装: 12-DFN(4x3)
包装: 管件
产品目录页面: 2388 (CN2011-ZH PDF)
配用: DC1018B-C-ND - DEMO BOARD FOR LT4356-3
DC1018B-B-ND - DEMO BOARD FOR LT4356-2
DC1018B-A-ND - DEMO BOARD FOR LT4356-1
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
MOSFET stress is the result of power dissipated within
the device. For long duration surges of 100ms or more,
stress is increasingly dominated by heat transfer; this is
a matter of device packaging and mounting, and heatsink
thermal mass. This is analyzed by simulation, using the
V REG
V PK
MOSFET thermal model.
V IN
t r
I LOAD 2 ( V PK – V REG ) τ
P 2 t =
(W 2 s)
? 1 ( b ? a ) 3 1 ? b ? ?
? ?
P 2 t = I LOAD 2 ? tr + τ ? 2a 2 ln + 3a 2 + b 2 ? 4ab ? ?
? ? 3
?
Forshortdurationtransientsoflessthan100ms,MOSFET
survival is increasingly a matter of safe operating area
(SOA), an intrinsic property of the MOSFET. SOA quanti-
?es the time required at any given condition of V DS and
I D to raise the junction temperature of the MOSFET to its
rated maximum. MOSFET SOA is expressed in units of
watt-squared-seconds (P 2 t). This ?gure is essentially con-
stant for intervals of less than 100ms for any given device
type, and rises to in?nity under DC operating conditions.
Destruction mechanisms other than bulk die temperature
distort the lines of an accurately drawn SOA graph so that
P 2 t is not the same for all combinations of I D and V DS .
In particular P 2 t tends to degrade as V DS approaches the
maximum rating, rendering some devices useless for
absorbing energy above a certain voltage.
Calculating Transient Stress
To select a MOSFET suitable for any given application, the
SOA stress must be calculated for each input transient
which shall not interrupt operation. It is then a simple matter
to chose a device which has adequate SOA to survive the
maximum calculated stress. P 2 t for a prototypical transient
waveform is calculated as follows (Figure 4).
Let
a = V REG – V IN
b = V PK – V IN
(V IN = Nominal Input Voltage)
Then
b 2 ? a
4356 F04
Figure 4. Safe Operating Area Required to Survive Prototypical
Transient Waveform
Typically V REG ≈ V IN and τ >> t r simplifying the above to
1 2
2
For the transient conditions of V PK = 80V, V IN = 12V, V REG
= 16V, t r = 10μs and τ = 1ms, and a load current of 3A, P 2 t
is 18.4W 2 s—easily handled by a MOSFET in a D-pak pack-
age. The P 2 t of other transient waveshapes is evaluated by
integrating the square of MOSFET power versus time.
Calculating Short-Circuit Stress
SOA stress must also be calculated for short-circuit condi-
tions. Short-circuit P 2 t is given by:
P 2 t = (V IN ? Δ V SNS /R SNS ) 2 ? t TMR (W 2 s)
where, Δ V SNS is the SENSE pin threshold, and t TMR is the
overcurrent timer interval.
For V IN = 14.7V, V SNS = 50mV, R SNS = 12m Ω and C TMR
= 100nF, P 2 t is 6.6W 2 s—less than the transient SOA
calculated in the previous example. Nevertheless, to
account for circuit tolerances this ?gure should be doubled
to 13.2W 2 s.
Limiting Inrush Current and GATE Pin Compensation
The LT4356 limits the inrush current to any load capacitance
by controlling the GATE pin voltage slew rate. An external
capacitor can be connected from GATE to ground to slow
down the inrush current further at the expense of slower
turn-off time. The gate capacitor is set at:
C1 =
I GATE(UP)
I INRUSH
?C L
4356fa
14
相关PDF资料
PDF描述
LT4356CMS-1#PBF IC OVERVOLT PROT REG 10-MSOP
BZW04P5V8B-E3/73 TVS 400W 5.8V 7% BIDIR DO-204AL
SSQ 200/5K FUSE 200MA 125V 2410 FAST SSQ
81060-600C01-RB CONN HEADER 60POS STR SMD
BZW04P5V8-E3/73 TVS 400W 5.8V 7% UNIDIR DO-204AL
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