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| 型号： | LTC1042CN8#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 5/8页 |
| 文件大小： | 0K |
| 描述： | IC CMOS COMPARATOR WINDOW 8DIP |
| 标准包装： | 50 |
| 系列： | LTCMOS™ |
| 类型： | 窗口 |
| 元件数： | 1 |
| 输出类型： | TTL |
| 电压 - 电源，单路/双路(±)： | 2.8 V ~ 16 V |
| 电流 - 输入偏压（最小值）： | 300pA @ ±5V |
| 电流 - 静态（最大值）： | 3mA |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 安装类型： | 通孔 |
| 包装： | 管件 |
| 产品目录页面： | 1324 (CN2011-ZH PDF) |
5
LTC1042
1042fa
APPLICATIO S I FOR ATIO
WU
UU
Figure 2. Equivalent Input Circuit
To synchronize the sampling of the LTC1042 to an external
frequency source, the OSC pin can be driven by a CMOS
gate. A CMOS gate is necessary because the input trip
points of the oscillator are close to the supply rails and TTL
does not have enough output swing. Externally driven,
there will be a delay from the rising edge of the OSC input
and the start of the sampling cycle of approximately 5s.
Input Impedance
The input impedance of the LTC1042 does not look like a
classic linear comparator; CMOS switches and a precision
capacitor array form the dual differential input structure.
Input impedance characteristics can be determined from
the equivalent circuit shown in Figure 2. The input
capacitance will charge with a time constant of RS CIN. It
is critical, in determining errors caused by the input
charging current, that CIN be fully charged during the
“active” time.
For RS ≤ 10k
For Rs less than or equal to 10k, CIN fully charges and no
error is caused by the charging current.
For RS > 10k
For source resistances greater than 10k, CIN cannot fully
charge, causing voltage errors. To minimize these errors
an input bypass capacitor, CS should be used. Charge is
shared between CIN and CS causing a voltage error. The
magnitude of this error is V = VIN x CIN/(CIN + CS). This
error can be made arbitrarily small by increasing CS.
The averaging effect of the bypass capacitor CS causes
another error term. Each time the input switches cycle
between the plus and minus inputs, CIN is charged and
discharged. The average input current due to this is
lAVG = VIN x CIN x fS, where fS is the sampling frequency.
Because the input current is directly proportional to the
differential input voltage, the LTC1042 can be said to have
an average input resistance of RIN = VIN/IAVG = 1/(fS x CIN).
Since two comparator inputs are connected in parallel, RIN
is one half this value (see typical curve of RIN vs Sampling
Frequency). This finite input resistance causes an error
due to voltage divided between RS and RIN.
The input error caused by both of these effects is
VERROR = VIN[2CIN/(2CIN + CS) + RS/(RS + RIN)].
EXAMPLE: Assume fS = 10Hz, RS = 1M, CS = 1F and
VIN = 1V. Then VERROR = 1V(66V + 660V) = 726V. If the
sampling frequency is reduced to 1Hz, the voltage error
from input impedance effects is reduced to 136V.
Input Voltage Range
The input switches of the LTC1042 are capable of
switching either to the V+ supply or ground. Consequently,
the input voltage range includes both supply rails. This is
a further benefit of the input sampling structure.
Error Specifications
The only measurable errors on the LTC1042 are the
deviations from “ideal” of the upper and lower window
limits [Figure 1(B)]. The critical parameters for a window
comparator are the width and center of the window. These
errors may be expressed in terms of VU and VL.
center error = [(VU + VL)/2] – CENTER
width error = (VU – VL) – 2 x (WIDTH/2)
The specified error limits (see Electrical Characteristics)
include error due to offset, power supply variation, gain,
time and temperature.
VIN
RS
CS
LTC1042 AI02
S1
S2
CIN
(~33pF)
V–
LTC1042 DIFFERENTIAL INPUT
~
+
–
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