参数资料
| 型号： | LTC1052CSW#TR |
| 厂商： | Linear Technology |
| 文件页数： | 18/24页 |
| 文件大小： | 0K |
| 描述： | IC OPAMP CHOP STABLE LN 16SOIC |
| 标准包装： | 1,000 |
| 系列： | LTCMOS™ |
| 放大器类型： | 断路器（零漂移） |
| 电路数： | 1 |
| 转换速率： | 4 V/µs |
| 增益带宽积： | 1.2MHz |
| 电流 - 输入偏压： | 1pA |
| 电压 - 输入偏移： | 0.5µV |
| 电流 - 电源： | 1.7mA |
| 电压 - 电源，单路/双路(±)： | 4.75 V ~ 16 V，±2.38 V ~ 8 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SO |
| 包装： | 带卷 (TR) |
LTC1052/LTC7652
3
1052fa
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Connecting any terminal to voltages greater than V+, or less than
V–, may cause destructive latch-up. It is recommended that no sources
operating from external supplies be applied prior to power-up of the
LTC1052/LTC7652.
Note 3: These parameters are guaranteed by design. Thermocouple effects
preclude measurement of the voltage levels in high speed automatic
testing. VOS is measured to a limit determined by test equipment
capability. Voltages on CEXTA and CEXTB, AVOL, CMRR and PSRR are
measured to insure proper operation of the nulling loop to ensure meeting
the VOS and VOS drift specifications. See Package-Induced VOS in the
Applications Information section.
Note 4: Output clamp not connected.
Note 5: Current noise is calculated from the formula: in = (2q IB)1/2, where
q = 1.6 10–19 coulomb.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V, test circuit TC1, unless otherwise noted.
LTC1052M
LTC1052C/LTC7652C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
(Note 3)
±0.5
±5
±0.5
±5
V
VOS/Temp Average Input Offset Drift
(Note 3)
●
±0.01
±0.05
±0.01
±0.05
V/°C
VOS/Time Long-Term Offset Voltage Stability
100
nV/√Month
IOS
Input Offset Current
±30
±90
±30
±90
pA
●
±2000
±350
pA
IB
Input Bias Current
±1
±30
±1
±30
pA
●
±1000
±175
pA
enP-P
Input Noise Voltage
RS = 100, DC to 10HZ, TC3
1.5
VP-P
RS = 100, DC to 1HZ, TC3
0.5
VP-P
In
Input Noise Current
f = 10Hz (Note 5)
0.6
fA/√Hz
CMRR
Common Mode Rejection Ratio
VCM = V– to 2.7V
●
120
140
120
140
dB
PSRR
Power Supply Rejection Ratio
VSUPPLY = ±2.375V to ±8V
●
120
150
120
150
dB
AVOL
Large-Signal Voltage Gain
RL = 10k, VOUT = ±4V
●
120
150
120
150
dB
VOUT
Maximum Output Voltage Swing
RL = 10k
●
±4.7
±4.85
±4.7
±4.85
V
(Note 4)
RL = 100k
±4.95
V
SR
Slew Rate
RL = 10k, CL = 50pF
4
V/s
GBW
Gain Bandwidth Product
1.2
MHz
IS
Supply Current
No Load
1.7
2.0
1.7
2.0
mA
●
3.0
mA
fS
Internal Sampling Frequency
330
Hz
Clamp On Current
RL = 100k
●
25
100
25
100
A
Clamp Off Current
– 4V < VOUT < 4V
10
100
10
100
pA
●
21
nA
Input Noise Voltage
VS = ±5V, TEST CIRCUIT (TC3)
DC TO 1Hz
DC TO 10Hz
5V
0
5V
10 SEC.
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