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| 型号： | LTC1266CS-3.3 |
| 厂商： | Linear Technology |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST PWM CM 16-SOIC |
| 标准包装： | 50 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 400kHz |
| 占空比： | 100% |
| 电源电压： | 3.5 V ~ 18 V |
| 降压： | 是 |
| 升压： | 是 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 包装： | 管件 |
| 产品目录页面： | 1342 (CN2011-ZH PDF) |
LTC1266
LTC1266-3.3/LTC1266-5
APPLICATIO S I FOR ATIO
From the duty cycles, the required R DS(ON) for each
MOSFET can be derived:
This formula has a maximum at V IN = 2V OUT , where
I RMS = I OUT /2. This simple worst-case condition is com-
TS R DS(ON) =
V IN ? P T
V OUT ? I MAX2 ? (1 + δ T )
monly used for design because even significant devia-
tions do not offer much relief. Note that capacitor
manufacturer’s ripple current ratings are often based on
BS R DS(ON) =
V IN ? P B
(V IN – V OUT ) ? I MAX2 ? (1 + δ B )
where P T and P B are the allowable power dissipations and
δ T and δ B are the temperature dependencies of R DS(ON) . P T
and P B will be determined by efficiency and/or thermal
requirements (see Efficiency Considerations). For a MOSFET,
(1 + δ ) is generally given in the form of a normalized
R DS(ON) vs temperature curve, but δ PCH = 0.007/ ° C and
δ NCH = 0.005/ ° C can be used as an approximation for low
voltage MOSFETs.
The minimum input voltage determines whether standard
threshold or logic-level threshold MOSFETs must be used.
For V IN > 8V, standard threshold MOSFETs (V GS(TH) < 4V)
may be used. If V IN is expected to drop below 8V, logic-
level threshold MOSFETs (V GS(TH) < 2.5V) are strongly
recommended. The LTC1266 series Power V IN must al-
ways be less than the absolute maximum V GS ratings for
the MOSFETs.
The Schottky diode D1 shown in Figure 1 only conducts
during the deadtime between the conduction of the two
power MOSFETs. D1’s sole purpose in life is to prevent the
body diode of the bottom-side MOSFET from turning on
and storing charge during the deadtime, which could cost
as much as 1% in efficiency (although there are no other
harmful effects if D1 is omitted). Therefore, D1 should be
selected for a forward voltage of less than 0.7V when
conducting I MAX .
C IN and C OUT Selection
In continuous mode, the current through the topside
MOSFET is a square wave of duty cycle V OUT /V IN . To
prevent large voltage transients, a low ESR (Effective
Series Resistance) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
only 2000 hours of life. This makes it advisable to further
derate the capacitor, or to choose a capacitor rated at a
higher temperature than required. Always consult the
manufacturer if there is any question. An additional 0.1 μ F
to 1 μ F ceramic capacitor is also required on Power V IN
(Pin 2) for high frequency decoupling.
The selection of C OUT is driven by the required ESR. The
ESR of C OUT must be less than twice the value of R SENSE
for proper operation of the LTC1266 series:
C OUT Required ESR < 2R SENSE
Optimum efficiency is obtained by making the ESR equal
to R SENSE . As the ESR is increased up to 2R SENSE , the
efficiency degrades by less than 1%. If the ESR is greater
than 2R SENSE , the voltage ripple on the output capacitor
will prematurely trigger Burst Mode operation, resulting in
disruption of continuous mode and an efficiency hit which
can be several percent. If Burst Mode operation is dis-
abled, the ESR requirement can be relaxed and is limited
only by the allowable output voltage ripple.
Manufacturers such as Nichicon and United Chemicon
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
from Sanyo has the lowest ESR/size ratio of any aluminum
electrolytic at a somewhat higher price. Once the ESR
requirement for C OUT has been met, the RMS current
rating generally far exceeds the I RIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirements of the application. An
excellent choice is the AVX TPS series of surface mount
tantalums.
At low supply voltages, a minimum capacitance at C OUT
is needed to prevent an abnormal low frequency oper-
ating mode (see Figure 4). When C OUT is made too
small, the output ripple at low frequencies will be large
C IN Required I RMS ≈ I MAX
[V OUT (V IN – V OUT )] 1/2
V IN
enough to trip the voltage comparator. This causes
Burst Mode operation to be activated when the LTC1266
11
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| LTC1266CS-5 | 功能描述:IC REG CTRLR BST PWM CM 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| LTC1266CS-5#PBF | 功能描述:IC REG CTRLR BST PWM CM 16-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| LTC1266CS-5#TR | 功能描述:IC REG CTRLR BST PWM CM 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| LTC1266CS-5#TRPBF | 功能描述:IC REG CTRLR BST PWM CM 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| LTC1266IS | 功能描述:IC REG CTRLR BST PWM CM 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
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