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参数资料
| 型号： | LTC1282BCSW#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/24页 |
| 文件大小： | 0K |
| 描述： | IC A/D CONV SAMPLING W/REF24SOIC |
| 标准包装： | 32 |
| 位数： | 12 |
| 采样率（每秒）： | 140k |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 24mW |
| 电压电源： | 双 ± |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，单极；1 个单端，双极 |
20
LTC1282
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
This is a two byte read instruction which loads the ADC
data (address B000) into the HL register pair. During the
first read operation, BUSY forces the microprocessor to
WAIT for the LTC1282 conversion. No WAIT states are
inserted during the second read operation when the mi-
croprocessor is reading the high data byte.
TMS32010 Microcomputer
Figure 23 shows an LTC1282/TMS32010 interface. The
LTC1282 is operating in the ROM Mode. The interface is
designed for a maximum TMS32010 clock frequency of
18MHz but will typically work over the full TMS32010
clock frequency range.
The LTC1282 is mapped at a port address. The following
I/O instruction starts a conversion and reads the previous
conversion result into data memory.
IN A,PA
(PA = PORT ADDRESS)
When conversion is complete, a second I/O instruction
reads the up-to-date data into memory and starts another
conversion. A delay at least as long as the ADC conversion
time must be allowed between I/O instructions.
DATA BUS
LTC1282 F21
ADDRESS BUS
D0
D11
R/W
DTACK
AS
A1
A23
MC68000
ADDRESS
DECODE
EN
D0/8
D11
RD
BUSY
CS
HBEN
LTC1282
ADDITIONAL PINS OMITTED FOR CLARITY
Figure 21. MC68000 Interface
8085A/Z80 Microprocessor
Figure 22 shows an LTC1282 interface for the Z80 and
8085A. The LTC1282 is operating in the Slow Memory
Mode and a two byte read is required. Not shown in the
figure is the 8-bit latch required to demultiplex the 8085A
common address/data bus. A0 is used to assert HBEN so
that an even address (HBEN = LOW) to the LTC1282 will
start a conversion and read the low data byte. An odd
address (HBEN = HIGH) will read the high data byte. This
is accomplished with the single 16-bit LOAD instruction
below.
For the 8085A
LHLD (B000)
For the Z80
LDHL, (B000)
Figure 22. 8085A and Z80 Interface
DATA BUS
LTC1282 F23
PORT ADDRESS BUS
D0
D11
DEN
PA0
PA2
TMS32010
ADDRESS
DECODE
EN
D0/8
D11
RD
CS
HBEN
LTC1282
LINEAR CIRCUITRY OMITTED FOR CLARITY
Figure 23. TMS32010 Interface
DATA BUS
LTC1282 F22
ADDRESS BUS
D0
D7
RD
WAIT
MREQ
A0
A15
Z80
8085A
ADDRESS
DECODE
EN
D0/8
D7
RD
BUSY
CS
HBEN
LINEAR CIRCUITRY OMITTED FOR CLARITY
LTC1282
A0
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