参数资料
型号: LTC1289CCSW
厂商: Linear Technology
文件页数: 26/28页
文件大小: 0K
描述: IC DATA ACQ SYS 12BIT 3V 20-SOIC
标准包装: 38
类型: 数据采集系统(DAS)
分辨率(位): 12 b
采样率(每秒): 25k
数据接口: 串行,并联
电压电源: 双 ±
电源电压: ±3.3V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
供应商设备封装: 20-SOIC
包装: 管件
其它名称: LTC1289CCS
7
LTC1289
1289fb
PI FU CTIO S
U
UU
BLOCK DIAGRAM
INPUT
SHIFT
REGISTER
SAMPLE
AND
HOLD
12-BIT
CAPACITIVE
DAC
VCC
20
ANALOG
INPUT MUX
1
2
3
4
5
6
7
8
9
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
DOUT
16
SCLK
18
CONTROL
AND
TIMING
15
CS
LTC1289 BD
17
REF+
14
DGND
10
AGND
11
V
12
REF
13
COMP
OUTPUT
SHIFT
REGISTER
DIN
19
ACLK
12-BIT
SAR
CH0 – CH7 (Pins 1 – 8): Analog Inputs. The analog in-
puts must be free of noise with respect to AGND.
COM (Pin 9): Common. The common pin defines the zero
reference point for all single-ended inputs. It must be free
of noise and is usually tied to the analog ground plane.
DGND (Pin 10):Digital Ground. This is the ground for the
internal logic. Tie to the ground plane.
AGND (Pin 11): Analog Ground. AGND should be tied di-
rectly to the analog ground plane.
V(Pin 12): Negative Supply. Tie Vto the most negative
potential in the circuit. (Ground in single supply applica-
tions.)
REF, REF+ (Pins 13,14) Reference Inputs. The reference
inputs must be kept free of noise with respect to AGND.
CS (Pin 15): Chip Select Input. A logic low on this input
enables data transfer.
DOUT (Pin 16): Digital Data Output. The A/D conversion
result is shifted out of this output.
DIN (Pin 17): Digital Input. The A/D configuration word is
shifted into this input.
SCLK (Pin 18): Shift Clock. This clock synchronizes the
serial data transfer.
ACLK (Pin 19): A/D Conversion Clock. This clock con-
trols the A/D conversion process.
VCC (Pin 20): Positive Supply. This supply must be kept
free of noise and ripple by bypassing directly to the analog
ground plane.
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