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参数资料
| 型号： | LTC1325CN#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/24页 |
| 文件大小： | 0K |
| 描述： | IC BATTERY MANAGMNT SYSTEM 18DIP |
| 标准包装： | 20 |
| 功能： | 充电管理 |
| 电池化学： | 铅酸，锂离子，镍镉，镍氢 |
| 电源电压： | 4.5 V ~ 16 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 18-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 18-DIP |
| 包装： | 管件 |
LTC1325
FU N CTIO N AL DESCRIPTIO
Bit 3: Maximum Cell Voltage (FMCV)
The MCV bit indicates when the battery cell voltage has
exceeded the preset limit. The bit is set when V CELL is
T OUT
0
1
CONDITIONS
No Timeout Has Occurred
Timeout Has Occurred
greater than the voltage at the MCV pin.
Bit 8: Fail-Safe Occurred (FS)
FMCV
0
1
CONDITIONS
V CELL < V MCV
V CELL > V MCV
The FS bit indicates that one of the fault detection circuits
halted the discharging or charging cycle. The bit is set
when an EDV, LTF, HTF, or t OUT fault occurs during
Bit 4: End Discharge Voltage (FEDV)
The EDV bit indicates when the battery cell voltage has
dropped below an internally preset limit. The bit is set
discharge. During charging, the bit is set when a MCV,
LTF, HTF, or t OUT fault occurs. The bit is reset by the
command word bit FSCLR.
when the battery cell voltage at the output of the voltage
divider V CELL is less than 900mV.
FEDV
CONDITIONS
FS
0
1
CONDITIONS
No Fail-Safe Has Occurred
Fail-Safe Has Occurred
0
1
V CELL > 900mV
V CELL < 900mV
DETAILED DESCRIPTION
Fault Conditions
Bit 5: High Temperature Fault (FHTF)
The HTF bit indicates when the battery temperature is too
high. Using a negative TC thermistor, the bit is set when
the voltage at the T BAT pin is less than the voltage at the
The LTC1325 monitors the battery for fault conditions
before and during discharge and charge (see Figure 3).
They include: battery removed/present (BATP), battery
reversed/shorted (BATR), maximum cell voltage exceeded
HTF pin.
V DD
FHTF
0
1
CONDITIONS
T BAT > V HTF
T BAT < V HTF
BATP
C1
1.8V
+
–
V DD
+
–
3.072V
LINEAR
REGULATOR
REG
V BAT
R TRK
R1
Bit 6: Low Temperature Fault (FLTF)
The LTF bit indicates when the battery temperature is too
PROGRAMMABLE
BATTERY
DIVIDER
R2
low. Using a negative TC thermistor, the bit is set when the
voltage at the T BAT pin is greater than the voltage at the
LTF pin.
FMCV
C2
+
–
REG
SENSE
MCV
FLTF
0
1
CONDITIONS
T BAT < V LTF
T BAT > V LTF
FEDV
BATR
C3
C4
+
–
+
–
900mV
100mV
R3
R L
Bit 7: Timeout (t OUT )
FHTF
C5
–
+
T BAT
HTF
The t OUT bit indicates that the battery charging time has
exceeded the preset limit. The bit is set when the internal
FLTF
C6
+
–
LTF
R4
R T
timer exceeds the limit set by the command bits TO0, TO1
and TO2.
12
LTC1325 ? F03
Figure 3. Fail-Safe or Fault Detection Circuitry
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