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| 型号： | LTC1403ACMSE-1#TRPBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | ADC |
| 英文描述： | Serial 12-Bit, 2.8Msps Sampling ADCs with Shutdown; Package: MSOP; No of Pins: 10; Temperature Range: 0°C to +70°C |
| 中文描述： | 1-CH 14-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PDSO10 |
| 封装： | LEAD FREE, PLASTIC, MSOP-10 |
| 文件页数： | 7/22页 |
| 文件大小： | 575K |
| 代理商： | LTC1403ACMSE-1#TRPBF |
LTC1403-1/LTC1403A-1
14031fb
applications inFormation
OneormorerisingedgesatSCKwakeuptheLTC1403-1/
LTC1403A-1forserviceveryquickly,andCONVcanstart
anaccurateconversionwithinaclockcycle.Fourrising
edgesatCONV,withoutanyinterveningrisingedgesat
SCK,puttheLTC1403-1/LTC1403A-1inSleepmodeand
thepowerdraindropsfrom16mWto10W.Oneormore
risingedgesatSCKwakeuptheLTC1403-1/LTC1403A-1
foroperation.Theinternalreference(VREF)takes2msto
slewandsettlewitha10Fload.Notethat,usingsleep
modemorefrequentlythanevery2ms,compromisesthe
settledaccuracyoftheinternalreference.Notethat,for
slowerconversionrates,theNapandSleepmodescanbe
usedforsubstantialreductionsinpowerconsumption.
DIGITAL INTERFACE
TheLTC1403-1/LTC1403A-1hasa3-wireSPI(SerialPro-
tocolInterface)interface.TheSCKandCONVinputsand
SDOoutputimplementthisinterface.TheSCKandCONV
inputsacceptswingsfrom3VlogicandareTTLcompat-
ible,ifthelogicswingdoesnotexceedVDD.Adetailed
descriptionofthethreeserialportsignalsfollows:
Conversion Start Input (CONV)
The rising edge of CONV starts a conversion, but
subsequent rising edges at CONV are ignored by the
LTC1403-1/LTC1403A-1untilthefollowing16SCKrising
edgeshaveoccurred.Itisnecessarytohaveaminimum
of16risingedgesoftheclockinputSCKbetweenris-
ingedgesofCONV.Buttoobtainmaximumconversion
speed,itisnecessarytoallowtwomoreclockperiods
betweenconversionstoallow39nsofacquisitiontime
for the internal ADC sample-and-hold circuit. With 16
clockperiodsperconversion,themaximumconversion
rateislimitedto2.8Mspstoallow39nsforacquisition
time.Ineithercase,theoutputdatastreamcomesout
withinthefirst16clockperiodstoensurecompatibility
withprocessorserialports.ThedutycycleofCONVcan
bearbitrarilychosentobeusedasaframesyncsignalfor
theprocessorserialport.Asimpleapproachtogenerate
CONVistocreateapulsethatisoneSCKwidetodrivethe
LTC1403-1/LTC1403A-1andthenbufferthissignalwith
theappropriatenumberofinverterstoensurethecorrect
delaydrivingtheframesyncinputoftheprocessorserial
port.ItisgoodpracticetodrivetheLTC1403-1/LTC1403A-1
CONVinputfirsttoavoiddigitalnoiseinterferenceduring
thesample-to-holdtransitiontriggeredbyCONVatthe
startofconversion.Itisalsogoodpracticetokeepthe
widthofthelowportionoftheCONVsignalgreaterthan
15nstoavoidintroducingglitchesinthefrontendofthe
ADCjustbeforethesample-and-holdgoesintoholdmode
attherisingedgeofCONV.
Minimizing Jitter on the CONV Input
Inhighspeedapplicationswherehighamplitudesinewaves
above100kHzaresampled,theCONVsignalmusthave
aslittlejitteraspossible(10psorless).Thesquarewave
outputofacommoncrystalclockmoduleusuallymeets
thisrequirementeasily.ThechallengeistogenerateaCONV
signalfromthiscrystalclockwithoutjittercorruptionfrom
otherdigitalcircuitsinthesystem.Aclockdividerand
anygatesinthesignalpathfromthecrystalclocktothe
CONVinputshouldnotsharethesameintegratedcircuit
withotherpartsofthesystem.Asshownintheinterface
circuitexamples,theSCKandCONVinputsshouldbe
drivenfirst,withdigitalbuffersusedtodrivetheserialport
interface.AlsonotethatthemasterclockintheDSPmay
alreadybecorruptedwithjitter,evenifitcomesdirectly
fromtheDSPcrystal.Anotherproblemwithhighspeed
processorclocksisthattheyoftenusealowcost,low
speedcrystal(i.e.,10MHz)togenerateafast,butjittery,
phase-locked-loopsystemclock(i.e.,40MHz).Thejitter
inthesePLL-generatedhighspeedclockscanbeseveral
nanoseconds.Notethatifyouchoosetousetheframe
syncsignalgeneratedbytheDSPport,thissignalwill
havethesamejitteroftheDSP’smasterclock.
Serial Clock Input (SCK)
TherisingedgeofSCKadvancestheconversionprocess
andalsoudpateseachbitintheSDOdatastream.After
CONVrises,thethirdrisingedgeofSCKstartsclocking
outthe12/14databitswiththeMSBsentfirst.Asimple
approach is to generate SCK to drive the LTC1403-1/
LTC1403A-1 first and then buffer this signal with the
appropriatenumberofinverterstodrivetheserialclock
inputoftheprocessorserialport.Usethefallingedgeof
相关PDF资料 |
PDF描述 |
|---|---|
| LTC1403AIMSE-1#PBF | Serial 12-Bit, 2.8Msps Sampling ADCs with Shutdown; Package: MSOP; No of Pins: 10; Temperature Range: -40°C to +85°C |
| LTC1403AIMSE-1#TRPBF | Serial 12-Bit, 2.8Msps Sampling ADCs with Shutdown; Package: MSOP; No of Pins: 10; Temperature Range: -40°C to +85°C |
| LTC1403CMSE-1#PBF | Serial 12-Bit, 2.8Msps Sampling ADCs with Shutdown; Package: MSOP; No of Pins: 10; Temperature Range: 0°C to +70°C |
| LTC1403CMSE-1#TRPBF | Serial 12-Bit, 2.8Msps Sampling ADCs with Shutdown; Package: MSOP; No of Pins: 10; Temperature Range: 0°C to +70°C |
| LTC1403IMSE-1#PBF | Serial 12-Bit, 2.8Msps Sampling ADCs with Shutdown; Package: MSOP; No of Pins: 10; Temperature Range: -40°C to +85°C |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC1403ACMSEPBF | 制造商:Linear Technology 功能描述:ADC,LTC1403A 14bit 2.8MSPS SPI MSOP |
| LTC1403AHMSE | 制造商:Linear Technology 功能描述:ADC Single SAR 2.8Msps 14-bit Serial 10-Pin MSOP EP |
| LTC1403AHMSE#PBF | 功能描述:IC ADC 14BIT 2.8MSPS DIFF 10MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
| LTC1403AHMSE#TRPBF | 功能描述:IC ADC 14BIT 2.8MSPS DIFF 10MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
| LTC1403AIMSE | 功能描述:IC ADC 14BIT 2.8MSPS DIFF 10MSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
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