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| 型号： | LTC1434IGN#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK 3.3V/5V/ADJ 20SSOP |
| 标准包装： | 55 |
| 类型： | 降压（降压） |
| 输出类型： | 两者兼有 |
| 输出数： | 1 |
| 输出电压： | 3.3V，5V，可调 |
| 输入电压： | 3 V ~ 13.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 最高 700kHz |
| 电流 - 输出： | 450mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
| 供应商设备封装： | 20-SSOP |
LTC1433/LTC1434
APPLICATIO N S I N FOR M ATIO N
further reducing the current to 15 μ A. The low side of the
resistive divider should connect to SGND.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1433/LTC1434. These items are also illustrated graphi-
cally in the layout diagram of Figure 13. Check the follow-
ing in your layout:
1. Are the signal and power grounds segregated? The
LTC1433/LTC1434 signal ground pin must return to
the (–) plate of C OUT . The power ground returns to the
anode of the Schottky diode and the (–) plate of C IN ,
which should have as short lead lengths as possible.
2. Does the LTC1433/LTC1434 V OSENSE pin connect to the
(+) plate of C OUT ? In adjustable applications, the resis-
tive divider R1/R2 must be connected between the (+)
plate of C OUT and signal ground.
3. Does the (+) plate of C IN connect to the power V IN as
close as possible? This capacitor provides the AC
current to the internal P-channel MOSFETs and their
drivers.
4. Is the Schottky diode closely connected between the
power ground and switch pin?
5. Keep the switching nodes, SSW and BSW away from
sensitive small-signal nodes V OSENSE , PLLIN, PLL LPF,
C OSC , I TH and LBI.
Design Example
As a design example, assume V IN = 6V, V OUT = 5V, I MAX =
400mA and f OSC = 200kHz. With these requirements we
can start choosing all of the important components.
With no frequency synchronization required, the LTC1433
can be used for this circuit. From Figure 2, the V PLL LPF =
0V curve is used to determine the value of the oscillator
capacitor. From the graph a value of 50pF will provide the
desired frequency.
Next the inductor value is selected. From the Maximum
Output Current vs Input Supply graph in the Typical
Performance Characteristics section, a value of L = 22 μ H
would be able to meet the requirement for the output load
current.
For the catch diode, a MBRS130LT3 is selected.
0.1 μ F
OUTPUT DIVIDER REQUIRED
WITH ADJUSTABLE VERSION
ONLY. CONNECT V OSENSE
D1
C IN
V OUT
C OUT
+
TO V OUT FOR FIXED
OUTPUT VOLTAGE
L1
1
2
3
4
NC
SSW
NC
BSW
20
PWRV IN
PGND 19
LTC1434 18
SV IN
17
PLLIN
5
SGND
PLL LPF
16
C SS
6
7
8
9
10
NC
RUN/SS
NC
LBO
LBI
C OSC
POR
I TH
V OSENSE
V PROG
15
14
13
12
11
C OSC
1433/34 F13
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 13. LTC1434 Layout Diagram (See Board Layout Check List)
13
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