参数资料
型号: LTC1605AISW#TRPBF
厂商: Linear Technology
文件页数: 15/16页
文件大小: 0K
描述: IC A/D CONV 16BIT SAMPLNG 28SOIC
标准包装: 1,000
位数: 16
采样率(每秒): 100k
数据接口: 并联
转换器数目: 1
功率耗散(最大): 80mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC
包装: 带卷 (TR)
输入数目和类型: 1 个单端,双极
配用: DC1255A-A-ND - BOARD SAR ADC LTC1605
8
LTC1605
1605fc
APPLICATIONS INFORMATION
WU
U
Driving the Analog Inputs
The nominal input range for the LTC1605 is
±10V or
(
±4 VREF)andtheinputisovervoltageprotectedto±25V.
The input impedance is typically 20k
,therefore,itshould
be driven with a low impedance source. Wideband noise
coupling into the input can be minimized by placing a
1000pF capacitor at the input as shown in Figure 2. An
NPO-type capacitor gives the lowest distortion. Place the
capacitor as close to the device input pin as possible. If an
amplifier is to be used to drive the input, care should be
taken to select an amplifier with adequate accuracy, linear-
ity and noise for the application. The following list is a
summary of the op amps that are suitable for driving the
LTC1605. More detailed information is available in the
Linear Technology data books and LinearView
TM CD-ROM.
Conversion Details
The LTC1605 uses a successive approximation algorithm
and an internal sample-and-hold circuit to convert an
analog signal to a 16-bit or two byte parallel output. The
ADC is complete with a precision reference and an internal
clock. The control logic provides easy interface to micro-
processors and DSPs. (Please refer to the Digital Interface
section for the data format.)
Conversion start is controlled by the CS and R/C inputs. At
the start of conversion the successive approximation
register (SAR) is reset. Once a conversion cycle has begun
it cannot be restarted.
During the conversion, the internal 16-bit capacitive DAC
output is sequenced by the SAR from the most significant
bit (MSB) to the least significant bit (LSB). Referring to
Figure 1, VIN is connected through the resistor divider to
the sample-and-hold capacitor during the acquire phase
and the comparator offset is nulled by the autozero switches.
In this acquire phase, a minimum delay of 2
s will provide
enough time for the sample-and-hold capacitor to acquire
the analog signal. During the convert phase, the autozero
switches open, putting the comparator into the compare
mode. The input switch switches CSAMPLE to ground,
injecting the analog input charge onto the summing junc-
tion. This input charge is successively compared with the
binary-weighted charges supplied by the capacitive DAC.
Bit decisions are made by the high speed comparator. At
the end of a conversion, the DAC output balances the VIN
input charge. The SAR contents (a 16-bit data word) that
represents the VIN are loaded into the 16-bit output latches.
Figure 1. LTC1605 Simplified Equivalent Circuit
VDAC
1605 F01
+
CDAC
DAC
SAMPLE
HOLD
CSAMPLE
S
A
R
16-BIT
LATCH
COMPARATOR
SAMPLE
SI
RIN2
RIN1
VIN
1605 F02
1000pF
33.2k
VIN
CAP
AIN
200
Figure 2. Analog Input Filtering
LT1007 - Low noise precision amplifier. 2.7mA supply
current
±5V to ±15V supplies. Gain bandwidth product
8MHz. DC applications.
LT1097 - Low cost, low power precision amplifier. 300
A
supply current.
±5V to ±15V supplies. Gain bandwidth
product 0.7MHz. DC applications.
LT1227 - 140MHz video current feedback amplifier. 10mA
supply current.
±5V to ±15V supplies. Low noise and low
distortion.
LT1360 - 37MHz voltage feedback amplifier. 3.8mA sup-
ply current.
±5V to ±15V supplies. Good AC/DC specs.
LT1363 - 50MHz voltage feedback amplifier. 6.3mA sup-
ply current. Good AC/DC specs.
LT1364/LT1365 - Dual and quad 50MHz voltage feedback
amplifiers. 6.3mA supply current per amplifier. Good AC/
DC specs.
LinearView is a trademark of Linear Technology Corporation
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