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参数资料
| 型号： | LTC1645IS8#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 6/24页 |
| 文件大小： | 329K |
| 描述： | IC CTLR HOT SWAP SEQ DUAL 8-SOIC |
| 标准包装： | 100 |
| 类型： | 热交换控制器 |
| 应用： | 通用 |
| 内部开关： | 无 |
| 电源电压： | 1.2 V ~ 12 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
6
LTC1645
1645fa
(14-Lead Package/8-Lead Package)
Whenever the timer is inactive, an internal N-channel FET
shorts the TIMER pin to ground. Activating the timer
connects a 2礎 current source from V
CC1
to the TIMER pin
and the voltage starts to ramp up with a slope dv/dt = 2礎/
C
TIMER
. When the voltage reaches the trip point (1.23V),
the timer is reset by pulling the TIMER pin back to ground.
The timer period is (1.23V " C
TIMER
)/2礎.
GATE1 (Pin 12/Pin 6): Channel 1 High Side Gate Drive.
Connect to the gate of an external N-channel MOSFET. An
internal charge pump guarantees at least 4.5V of gate
drive. The charge pump is powered by the higher of V
CC1
and V
CC2
. When the ON pin exceeds 0.8V, GATE1 is turned
on by connecting a 10礎 current source from the charge
pump output to the GATE1 pin and the voltage starts to
ramp up with a slope dv/dt = 10礎/C
GATE1
. While the ON
pin is below 0.8V but above 0.4V, a 40礎 current source
pulls GATE1 toward ground. If the ON pin is below 0.4V,
the circuit breaker trips or the undervoltage lockout circuit
trips, the GATE1 pin is immediately pulled to ground with
a 12mA (typ) current source.
SENSE1 (Pin 13/Pin 7): V
CC1
Circuit Breaker Set Pin. With
a sense resistor placed in the supply path between V
CC1
and SENSE1, the circuit breaker trips when the voltage
across the resistor exceeds 50mV for more than 1.5祍. If
the circuit breaker trip current is set to twice the normal
operating current, only 25mV is dropped across the sense
resistor during normal operation. To disable the circuit
breaker, short V
CC1
and SENSE1 together.
V
CC1
(Pin 14/Pin 8): Positive Supply Input. V
CC1
can range
from 2.375V to 12V for normal operation. I
CC1
is typically
1mA. An undervoltage lockout circuit disables the chip
whenever the voltage at V
CC1
is less than 2.23V. All internal
logic is powered by V
CC1
.
+
+
+
+
2.23V
UVL
2V
ON
0.8V
0.4V
REF
1.5祍
FILTER
1.12V
UVL
1.5祍
FILTER
LOGIC
GLITCH
FILTER
REF
REF
4?CHARGE
PUMP
1.238V
REFERENCE
50mV
50mV
2礎
+
+
10
V
CC1
14
SENSE1
13
V
CC2
1
SENSE2
2
GATE1
12
GATE2
3
FB
6
RESET
5
GND
7
COMP
+
8
COMPOUT
9
FAULT
4
1645 BD
TIMER
11
U
PI FU CTIO S
BLOCK DIAGRA
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