参数资料
| 型号： | LTC1663-1CS5#TRM |
| 厂商： | Linear Technology |
| 文件页数： | 10/12页 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT R-R TSOT23-5 |
| 标准包装： | 1 |
| 设置时间： | 30µs |
| 位数： | 10 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 630µW |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-5 细型，TSOT-23-5 |
| 供应商设备封装： | TSOT-23-5 |
| 包装： | 剪切带 (CT) |
| 输出数目和类型： | 1 电压，单极 |
| 采样率（每秒）： | * |
| 产品目录页面： | 1350 (CN2011-ZH PDF) |
| 其它名称： | LTC1663-1CS5 LTC1663-1CS5#TRMCT LTC1663-1CS5-ND LTC1663CS5-1 LTC1663CS5-1-ND |
LTC1663
7
1663fd
Serial Digital Interface
The LTC1663 communicates with a host (master) using
the standard 2-wire interface. The Timing Diagram shows
the timing relationship of the signals on the bus. The two
bus lines, SDA and SCL, must be high when the bus is
not in use. External pull-up resistors or current sources,
such as the LTC1694 SMBus Accelerator, are required on
these lines.
The LTC1663 is a receive-only (slave) device. The master
can communicate with the LTC1663 using the Quick Com-
mand, Send Byte or Write Word protocols as explained
later.
The START and STOP Conditions
When the bus is not in use, both SCL and SDA must be
high. A bus master signals the beginning of a communica-
tion to a slave device by transmitting a START condition.
A START condition is generated by transitioning SDA
from high to low while SCL is high.
When the master has nished communicating with the
slave, it issues a STOP condition. A STOP condition is
generated by transitioning SDA from low to high while
SCL is high. The bus is then free for communication with
another SMBus device.
Acknowledge
The Acknowledge signal is used for handshaking between
the master and the slave. An Acknowledge (active LOW)
generated by the slave lets the master know that the latest
byte of information was received. The Acknowledge related
clock pulse is generated by the master. The master releases
the SDA line (HIGH) during the Acknowledge clock pulse.
The slave-receiver must pull down the SDA line during the
Acknowledge clock pulse so that it remains a stable LOW
during the HIGH period of this clock pulse.
Write Word Protocol
The master initiates communication with the LTC1663 with
a START condition and a 7-bit address followed by the Write
DEFINITIONS
Write Word Protocol Used by the LTC1663
Command Byte
A
Slave Address
A
Wr
LSData Byte
A
MSData Byte
A
P
S
81
71
18
1
8
1663 TA03
11
1
S = Start Condition, Wr = Write Bit = 0, A = Acknowledge, P = Stop Condition
Integral Nonlinearity (INL): The deviation from a straight
line passing through the endpoints of the DAC transfer
curve (Endpoint INL). Because the output cannot go
below zero, the linearity is measured between full scale
and the lowest code that guarantees the output will be
greater than zero. The INL error at a given input code is
calculated as follows:
INL = [VOUT – VOS – (VFS – VOS)(code/1023)]/LSB
Where VOUT is the output voltage of the DAC measured
at the given input code.
Least Signicant Bit (LSB): The ideal voltage difference
between two successive codes.
LSB = VREF/1024
Resolution (n): Denes the number of DAC output states
(2n) that divide the full-scale range. Resolution does not
imply linearity.
Voltage Offset Error (VOS): Nominally, the voltage at the
output when the DAC is loaded with all zeros. A single
supply DAC can have a true negative offset, but the output
cannot go below zero (see Applications Information).
For this reason, single supply DAC offset is measured at
the lowest code that guarantees the output will be greater
than zero.
APPLICATIONS INFORMATION
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相关代理商/技术参数 |
参数描述 |
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| LTC1663-2CS5#TR | 功能描述:IC DAC 10BIT R-R TSOT23-5 RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 设计资源:Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) Single Supply Low Noise LED Current Source Driver Using a Current Output DAC in the Reverse Mode (CN0139) 标准包装:10,000 系列:- 设置时间:- 位数:12 数据接口:DSP，MICROWIRE?，QSPI?，串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:SOT-23-8 薄型，TSOT-23-8 供应商设备封装:TSOT-23-8 包装:带卷 (TR) 输出数目和类型:1 电流，单极；1 电流，双极 采样率（每秒）:2.7M |
| LTC1663-2CS5#TRM | 功能描述:IC DAC 10BIT R-R TSOT23-5 RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 设计资源:Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) Single Supply Low Noise LED Current Source Driver Using a Current Output DAC in the Reverse Mode (CN0139) 标准包装:10,000 系列:- 设置时间:- 位数:12 数据接口:DSP，MICROWIRE?，QSPI?，串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:SOT-23-8 薄型，TSOT-23-8 供应商设备封装:TSOT-23-8 包装:带卷 (TR) 输出数目和类型:1 电流，单极；1 电流，双极 采样率（每秒）:2.7M |
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