参数资料
型号: LTC1736IG#TRPBF
厂商: Linear Technology
文件页数: 3/28页
文件大小: 0K
描述: IC SW REG STEP-DONW SYNC 24-SSOP
标准包装: 1,800
应用: 转换器,Intel Pentium? II,III
输入电压: 3.5 V ~ 36 V
输出数: 1
输出电压: 0.93 V ~ 2 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 带卷 (TR)
LTC1736
ELECTRICAL CHARACTERISTICS The q denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T A = 25 ° C. V IN = 15V, V RUN/SS = 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
BG Transition Time:
(Note 9)
BG t r
BG t f
TG/BG T1D
Rise Time
Fall Time
Top Gate Off to Synchronous
C LOAD = 3300pF
C LOAD = 3300pF
C LOAD = 3300pF Each Driver
50
40
100
90
80
ns
ns
ns
Gate-On Delay Time
TG/BG T2D
Synchronous Gate Off to Top
C LOAD = 3300pF Each Driver
70
ns
Gate-On Delay Time
Internal V CC Regulator
V INTVCC
V LDO(INT)
V LDO(EXT)
Internal V CC Voltage
Internal V CC Load Regulation
EXTV CC Drop Voltage
6V < V IN < 30V, V EXTVCC = 4V
I CC = 0mA to 20mA, V EXTVCC = 4V
I CC = 20mA, V EXTVCC = 5V
5.0
5.2
0.2
130
5.4
1
200
V
%
mV
V EXTVCC
EXTV CC Switchover Voltage
I CC = 20mA, EXTV CC Ramping Positive
q
4.5
4.7
V
V EXTVCC(HYS)
EXTV CC Hysteresis
0.2
V
Oscillator
f OSC
Oscillator Frequency
(Note 5), C OSC = 43pF
265
300
335
kHz
f H /f OSC
Maximum Sync Frequency Ratio
1.3
f FCB(SYNC)
FCB Pin Threshold For Sync
Ramping Negative
0.9
1.2
V
PGOOD Output
V PGL
I PGOOD
PGOOD Voltage Low
PGOOD Leakage Current
I PGOOD = 2mA
V PGOOD = 5V
110
200
± 1
mV
μ A
V PG
PGOOD Trip Level
V OSENSE with Respect to Set Output Voltage
V OSENSE Ramping Negative
V OSENSE Ramping Positive
– 6.0
6.0
– 7.5
7.5
– 9.5
9.5
%
%
VID Control
VIDV CC
VID Operating Supply Voltage
2.7
5.5
V
I VIDVCC
R VFB/VOSENSE
R RATIO
R PULL-UP
V IDT
I VIDLEAK
V PULL-UP
VID Supply Current
Resistance Between V OSENSE and V FB
Resistor Ratio Accuracy
VID0 to VID4 Pull-Up Resistance
VID Input Voltage Threshold
VID Input Leakage Current
VID Pull-Up Voltage
(Note 6) VIDV CC = 3.3V
Programmed from 0.925V to 2.00V
(Note 7) V DIODE = 0.6V
(Note 7) VIDV CC < VID < 7V
VIDV CC = 3.3V
0.4
0.01
10
± 0.05
40
1.0
0.01
2.8
5
1.6
± 1
μ A
k ?
%
k ?
V
μ A
V
VIDV CC = 5V
4.5
V
? 8 . 477 ( 10 11 ) ? ? 1 1 ? – 1
? ?
?
? C OSC ( pF ) + 11 ? ? I CHG DIS ?
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: T J is calculated from the ambient temperature T A and power
dissipation P D according to the following formulas:
LTC1736CG, LTC1736IG: T J = T A + (P D ? 110 ° C/W)
Note 3: The LTC1736 is tested in a feedback loop that servos V FB to the
balance point for the error amplifier (V ITH = 1.2V).
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 5: Oscillator frequency is tested by measuring the C OSC charge
current (I OSC ) and applying the formula:
f OSC = ? +
I
Note 6: With all five VID inputs floating (or tied to VIDV CC ) the VIDV CC
current is typically < 1 μ A. However, the VIDV CC current will rise and be
approximately equal to the number of grounded VID input pins times
(VIDV CC – 0.6V)/40k. (See the Applications Information section for more
detail.)
Note 7: Each built-in pull-up resistor attached to the VID inputs also has a
series diode to allow input voltages higher than the VIDV CC supply without
damage or clamping. (See the Applications Information section for more
detail.)
Note 8: The minimum on-time condition corresponds to the on inductor
peak-to-peak ripple current ≥ 40% of I MAX (see minimum on-time
considerations in the Applications Information section).
Note 9: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
3
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