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| 型号： | LTC1754ES6-5#TR |
| 厂商： | Linear Technology |
| 文件页数： | 6/12页 |
| 文件大小： | 0K |
| 描述： | IC REG SWITCHED CAP 5V SOT23-6 |
| 标准包装： | 2,500 |
| 类型： | 切换式电容器（充电泵） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 5V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | Burst Mode? |
| 频率 - 开关： | 700kHz |
| 电流 - 输出： | 50mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | SOT-23-6 |
LTC1754-3.3/LTC1754-5
APPLICATIO S I FOR ATIO
Operation (Refer To Block Diagram)
The LTC1754 uses a switched-capacitor charge pump to
boost V IN to a regulated output voltage. Regulation is
achieved by sensing the output voltage through an internal
resistor divider and enabling the charge pump when the
divided output drops below the lower trip point of COMP1.
When the charge pump is enabled, a two-phase
nonoverlapping clock activates the charge pump switches.
The flying capacitor is charged to V IN on phase one of the
clock. On phase two of the clock it is stacked in series with
V IN and connected to V OUT . This sequence of charging and
discharging the flying capacitor continues at a free run-
ning frequency of 600kHz (typ). Once the attenuated
output voltage reaches the upper trip point of COMP1, the
charge pump is disabled. When the charge pump is
disabled the LTC1754 draws only 13 μ A from V IN thus
providing high efficiency under low load conditions.
In shutdown mode all circuitry is turned off and the
LTC1754 draws only leakage current from the V IN supply.
Furthermore, V OUT is disconnected from V IN . The SHDN
pin is a CMOS input with a threshold voltage of approxi-
mately 0.8V, but may be driven to a logic level that exceeds
V IN . The LTC1754 is in shutdown when a logic low is
applied to the SHDN pin. Since the SHDN pin is a high
impedance CMOS input, it should never be allowed to
float. To ensure that its state is defined, it must always be
driven with a valid logic level.
Power Efficiency
The efficiency ( η ) of the LTC1754 is similar to that of a
linear regulator with an effective input voltage of twice the
actual input voltage. This results because the input current
for a voltage doubling charge pump is approximately twice
the output current. In an ideal voltage doubling regulator
the power efficiency would be given by:
V IN = 3V, I OUT = 25mA and V OUT regulating to 5V, has a
measured efficiency of 82.7%, which is in close agreement
with the theoretical 83.3% calculation. The LTC1754 con-
tinues to maintain good efficiency even at fairly light loads
because of its inherently low power design.
Short-Circuit/Thermal Protection
During short-circuit conditions, the LTC1754 will draw
between 100mA and 400mA from V IN causing a rise in the
junction temperature. On-chip thermal shutdown circuitry
disables the charge pump once the junction temperature
exceeds approximately 150 ° C and reenables the charge
pump once the junction temperature drops back to ap-
proximately 140 ° C. The LTC1754 will cycle in and out of
thermal shutdown indefinitely without latchup or damage
until the short circuit on V OUT is removed.
Capacitor Selection
The style and value of capacitors used with the
LTC1754 determine several important parameters such as
output ripple, charge pump strength and turn-on time.
To reduce noise and ripple, it is recommended that low
ESR (< 0.1 ? ) capacitors be used for both C IN and C OUT .
These capacitors should be either ceramic or tantalum and
be 6.8 μ F or greater. Aluminum capacitors are not recom-
mended because of their high ESR. If the source imped-
ance to V IN is very low up to several megahertz, C IN may
not be needed.
A ceramic capacitor is recommended for the flying capaci-
tor with a value in the range of 1 μ F to 2.2 μ F. Note that a
large value flying capacitor (> 2.2 μ F) will increase output
ripple unless C OUT is also increased. For very low load
applications, C FLY may be reduced to 0.01 μ F to 0.047 μ F.
This will reduce output ripple at the expense of maximum
output current and efficiency.
η= =
( V OUT )( OUT )
= OUT
P OUT
P IN
I
( V IN )( 2 I OUT )
V
2 V IN
In order to achieve the rated output current it is necessary
to have at least 0.6 μ F of capacitance for the flying capaci-
tor. Capacitors of different material lose their capacitance
over temperature at different rates. For example, a ceramic
At moderate-to-high output power, the switching losses and
quiescent current of the LTC1754 are negligible and the
expression above is valid. For example, an LTC1754-5 with
6
capacitor made of X7R material will retain most of its
capacitance from – 40 ° C to 85 ° C, whereas a Z5U or Y5V
style capacitor will lose considerable capacitance over that
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相关代理商/技术参数 |
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| LTC1754ES6-5TRMPBF | 制造商:Linear Technology 功能描述:Reg. 3.3V/5V Charge Pump Shutdn TSOT23-6 |
| LTC1754ES6-5TRPBF | 制造商:Linear Technology 功能描述: |
| LTC1755EGN | 功能描述:IC SMART CARD INTERFACE 24SSOP RoHS:否 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| LTC1755EGN#PBF | 功能描述:IC SMART CARD INTERFACE 24SSOP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| LTC1755EGN#TR | 功能描述:IC SMART CARD INTERFACE 24SSOP RoHS:否 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
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