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| 型号： | LTC1779ES6#TRMPBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 0.25A SOT23-6 |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 9.8 V |
| 输入电压： | 2.5 V ~ 9.8 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 100kHz ~ 550kHz |
| 电流 - 输出： | 250mA |
| 同步整流器： | 无 |
| 工作温度： | -65°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 |
| 包装： | 标准包装 |
| 供应商设备封装： | SOT-23-6 |
| 产品目录页面： | 1333 (CN2011-ZH PDF) |
| 其它名称： | LTC1779ES6#TRMPBFDKR |
LTC1779
APPLICATIO S I FOR ATIO
105
Although all dissipative elements in the circuit produce
100
95
90
85
80
V REF
V ITH
losses, four main sources usually account for most of the
losses in LTC1779 circuits: 1) LTC1779 DC bias current,
2) MOSFET gate charge current, 3) I 2 R losses and 4)
voltage drop of the output diode.
1. The V IN current is the DC supply current, given in the
electrical characteristics, that excludes MOSFET driver
and control currents. V IN current results in a small loss
75
2.0
2.2
2.4 2.6 2.8
INPUT VOLTAGE (V)
3.0
which increases with V IN .
2. MOSFET gate charge current results from switching
1779 F04
Figure 4. Line Regulation of V REF and V ITH
Setting Output Voltage
The LTC1779 develops a 0.8V reference voltage between
the feedback (Pin 3) terminal and ground (see Figure 5). By
selecting resistor R1, a constant current is caused to flow
through R1 and R2 to set the overall output voltage. The
regulated output voltage is determined by:
the gate capacitance of the internal power MOSFET.
Each time the MOSFET gate is switched from low to
high to low again, a packet of charge dQ moves from
V IN to ground. The resulting dQ/dt is a current out of
V IN which is typically much larger than the DC supply
current. In continuous mode, I GATECHG = f(Qp).
3. I 2 R losses are predicted from the DC resistances of the
internal MOSFET, inductor and current shunt. In con-
tinuous mode the average output current flows through
V OUT = 0 . 8 ? 1 +
R 1 ?
?
?
R 2 ?
?
L but is “chopped” between the internal P-channel
MOSFET in series with R SENSE and the output diode.
The MOSFET R DS(ON) plus R SENSE multiplied by duty
For most applications, an 80k resistor is suggested for R1.
To prevent stray pickup, locate resistors R1 and R2 close
to LTC1779.
V OUT
cycle can be summed with the resistances of L and
R SENSE to obtain I 2 R losses.
4. The output diode is a major source of power loss at
high currents and gets worse at high input voltages.
LTC1779
V FB
3
R2
The diode loss is calculated by multiplying the forward
voltage times the diode duty cycle multiplied by the
R1
1779 F05
Figure 5. Setting Output Voltage
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – ( η 1 + η 2 + η 3 + ...)
where η 1, η 2, etc. are the individual losses as a percent-
load current. For example, assuming a duty cycle of
50% with a Schottky diode forward voltage drop of
0.4V, the loss increases from 0.5% to 8% as the load
current increases from 0.5A to 2A.
5. Transition losses apply to the internal MOSFET and
increase at higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2(V IN ) 2 I O(MAX) C RSS (f)
Other losses including C IN and C OUT ESR dissipative
losses, and inductor core losses, generally account for
less than 2% total additional loss.
age of input power.
9
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