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参数资料
| 型号： | LTC1850CFW#TR |
| 厂商： | Linear Technology |
| 文件页数： | 16/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 1.25MSPS 48-TSSOP |
| 标准包装： | 1,800 |
| 位数： | 10 |
| 采样率（每秒）： | 1.25M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 50mW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 8 个单端，单极；8 个单端，双极；4 个差分，单极；4 个差分，双极 |
| 其它名称： | LTC1850CFWTR |
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23
LTC1850/LTC1851
18501f
APPLICATIO S I FOR ATIO
WU
UU
The sequencer is accessed by taking the M1 mode pin
high. With M1 high, the sequencer memory is accessed by
taking the M0 mode pin low. This will cause BUSY to go
low, disabling conversions during the programming and
readback of the sequencer. The sequencer is reset to
location 0000 whenever M1 or M0 changes state. One of
these signals should be cycled prior to any read or write
operation to guarantee that the sequencer will be pro-
grammed or read starting at location 0000.
The sequencer is programmed sequentially starting from
location 0000. RD and WR should be held high, the
appropriate signals applied to the DIFF pin, the A2 to A0
MUX address pins, the UNI/BIP pin and the PGA pin and
WR taken low to write to the memory. The rising edge of
WR will latch the data into memory and advance the
pointer to the next sequencer location. Up to 16 locations
can be programmed and the last location written before
M0 is taken back high will be the last location in the
sequence. After 16 writes, the pointer is reset to location
0000 and any subsequent writes will overwrite the previ-
ous contents and start a new sequence.
The sequencer memory can be read by holding WR high
and driving RD. Taking RD low accesses the sequencer
memory and enables the data output pins. The sequencer
should be reset to location 0000 (by pulsing M0 high)
before beginning a read operation. The seven output bits
will be available on the DIFFOUT/S6, A2OUT/S5, A1OUT/S4,
A0OUT/S3, D11/S2, D10/S1 and D9/S0 pins (LTC1851) or
DIFFOUT/S6, A2OUT/S5, A1OUT/S4, A0OUT/S3, D9/S2, D8/
S1 and D7/S0 pins (LTC1850). The D8 to D0 (LTC1851) or
D6 to D0 (LTC1850) data output pins will remain high
impedance during readback. RD going high will return the
data output pins to a high impedance state and advance the
pointer to the next location. A logic 1 on the D9/S0 (or D7/
S0) pin indicates the last location in the current sequence
but all 16 locations can be read by continuing to clock RD.
After 16 reads, the pointer is reset to location 0000. When
all programming and/or reading of the sequencer memory
is complete, M0 is taken high. BUSY will come back high
enabling CONVST and indicating that the part is ready to
start a conversion.
LOCATION 0000
S6
DIFF
S5
A2
S4
A1
S3
A0
S2
UNI/BIP
S1
PGA
S0
EOS
LOCATION 0001
LOCATION 0010
LOCATION 1110
LOCATION 1111
1851 F10
Figure 10. Sequencer Memory Block Diagram
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| LTC1850IFW#TR | 功能描述:IC ADC 10BIT 1.25MSPS 48-TSSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
| LTC1850IFW#TRPBF | 功能描述:IC ADC 10BIT 1.25MSPS 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
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