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| 型号： | LTC1850CFW#TR |
| 厂商： | Linear Technology |
| 文件页数： | 8/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 1.25MSPS 48-TSSOP |
| 标准包装： | 1,800 |
| 位数： | 10 |
| 采样率（每秒）： | 1.25M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 50mW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 8 个单端，单极；8 个单端，双极；4 个差分，单极；4 个差分，双极 |
| 其它名称： | LTC1850CFWTR |
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16
LTC1850/LTC1851
18501f
LT1468/LT1469: Single and Dual 90MHz Voltage Feed-
back Amplifier.
±5V to ±15V supplies. 7mA supply current
per amplifier. Lowest noise and low distortion.
LT1630/LT1631: Dual and Quad 30MHz Rail-to-Rail Volt-
age Feedback Amplifiers. Single 3V to
±15V supplies.
3.5mA supply current per amplifier. Low noise and low
distortion.
LT1632/LT1633: Dual and Quad 45MHz Rail-to-Rail Volt-
age Feedback Amplifiers. Single 3V to
±15V supplies.
4.3mA supply current per amplifier. Low distortion.
LT1806/LT1807: Single and Dual 325MHz Rail-to-Rail
Voltage Feedback Amplifier. Single 3V to
±5V supplies.
13mA supply current. Lowest distortion.
LT1809/LT1810: Single and Dual 180MHz Rail-to-Rail
Voltage Feedback Amplifier. Single 3V to
±15V supplies.
20mA supply current. Lowest distortion.
LT1812/LT1813: 100MHz Voltage Feedback Amplifier.
Single 5V to
±5V supplies. 3.6mA supply current. Low
noise and low distortion.
Input Filtering
The noise and the distortion of the input amplifier and
other circuitry must be considered since they will add to
the LTC1850/LTC1851 noise and distortion. Noisy input
circuitry should be filtered prior to the analog inputs to
minimize noise. A simple 1-pole RC filter is sufficient for
many applications. For instance, a 100
source resistor
and a 1000pF capacitor to ground on the input will limit the
input bandwidth to 1.6MHz. The capacitor also acts as a
charge reservoir for the input sample-and-hold and iso-
lates the ADC input from sampling glitch sensitive cir-
cuitry. High quality capacitors and resistors should be
used since these components can add distortion. NPO and
silver mica type dielectric capacitors have excellent linear-
ity. Carbon surface mount resistors can also generate
distortion from self heating and from damage that may
occur during soldering. Metal film surface mount resistors
are much less susceptible to both problems.
APPLICATIO S I FOR ATIO
WU
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REFERENCE
The LTC1850/LTC1851 include an on-chip, temperature
compensated, curvature corrected, bandgap reference
that is factory trimmed to 2.500V and has a very flexible
3-pin interface. REFOUT is the 2.5V bandgap output,
REFIN is the input to the reference buffer and REFCOMP
is the reference buffer output. REFOUT must be bypassed
with a 1
F or greater capacitor to ground for stability. The
input span is determined by the voltage appearing on the
REFCOMP pin as shown in Table 2. The reference buffer
has a gain of 1.6384 and is factory trimmed by forcing an
external 2.500V on the REFIN pin and trimming REFCOMP
to 4.096V. The 3-pin interface allows for three pin-
strappable Reference modes as well as two additional
external Reference modes. For voltages on the REFIN pin
ranging from 1V to 2.6V, the output voltage on REFCOMP
will equal 1.6384 times the voltage on the REFIN pin. In
this mode, the REFIN pin can be tied to REFOUT to utilize
the internal 2.5V reference to get 4.096V on REFCOMP or
driven with an external reference or DAC. If REFIN is tied
low, the internal 2.5V reference divided by 2 (1.25V) is
connected internally to the input of the reference buffer
resulting in 2.048V on REFCOMP. If REFIN is tied high, the
reference buffer is disabled and REFCOMP can be tied to
REFOUT to achieve a 2.5V span or driven with an external
reference or DAC. Table 3 summarizes the Reference
modes.
Table 3. Reference Mode Table
MODE
REFIN
REFCOMP
REFIN Tied Low
= GND
2.048V Output
REFIN is Buffer Input
1V to 2.6V Input
1.6384V to 4.26V Output
(1.6384 REFIN)
REFIN Tied High
= VDD
Input, 6.4k
to Ground
Full Scale and Offset
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero during
a calibration sequence. Offset error must be adjusted
before full-scale error. Zero offset is achieved by adjusting
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