参数资料
型号: LTC1871EMS
厂商: Linear Technology
文件页数: 10/36页
文件大小: 0K
描述: IC REG CTRLR BST FLYBK CM 10MSOP
标准包装: 50
PWM 型: 电流模式
输出数: 1
频率 - 最大: 1MHz
占空比: 97%
电源电压: 2.5 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 管件
LTC1871
OPERATION
MOSFET R DS(ON) . If the I TH pin drops below 0.30V, the
Burst Mode comparator B1 will turn off the power MOSFET
and scale back the quiescent current of the IC to 250μA
(sleep mode). In this condition, the load current will be
supplied by the output capacitor until the I TH voltage rises
above the 50mV hysteresis of the burst comparator. At
light loads, short bursts of switching (where the average
inductor current is 20% of its maximum value) followed
by long periods of sleep will be observed, thereby greatly
improving converter ef?ciency. Oscilloscope waveforms
illustrating Burst Mode operation are shown in Figure 3.
Pulse-Skip Mode Operation
With the MODE/SYNC pin tied to a DC voltage above 2V,
Burst Mode operation is disabled. The internal, 0.525V
buffered I TH burst clamp is removed, allowing the I TH
pin to directly control the current comparator from no
load to full load. With no load, the I TH pin is driven below
0.30V, the power MOSFET is turned off and sleep mode
is invoked. Oscilloscope waveforms illustrating this mode
of operation are shown in Figure 4.
When an external clock signal drives the MODE/SYNC
pin at a rate faster than the chip’s internal oscillator, the
oscillator will synchronize to it. In this synchronized mode,
Burst Mode operation is disabled. The constant frequency
associated with synchronized operation provides a more
controlled noise spectrum from the converter, at the ex-
pense of overall system ef?ciency of light loads.
When the oscillator’s internal logic circuitry detects a
synchronizing signal on the MODE/SYNC pin, the in-
ternal oscillator ramp is terminated early and the slope
compensation is increased by approximately 30%. As
a result, in applications requiring synchronization, it is
recommended that the nominal operating frequency of
the IC be programmed to be about 75% of the external
clock frequency. Attempting to synchronize to too high an
external frequency (above 1.3f O ) can result in inadequate
slope compensation and possible subharmonic oscillation
(or jitter).
The external clock signal must exceed 2V for at least 25ns,
and should have a maximum duty cycle of 80%, as shown
in Figure 5. The MOSFET turn on will synchronize to the
V IN = 3.3V
V OUT = 5V
MODE/SYNC = 0V
(Burst Mode OPERATION)
rising edge of the external clock signal.
I OUT = 500mA
V OUT
50mV/DIV
2V TO 7V
I L
5A/DIV
MODE/
SYNC
t MIN = 25ns
10μs/DIV
1871 F03
0.8T
T
T = 1/f O
Figure 3. LTC1871 Burst Mode Operation
(MODE/SYNC = 0V) at Low Output Current
V IN = 3.3V
MODE/SYNC = INTV CC
GATE
D = 40%
V OUT
50mV/DIV
V OUT = 5V
I OUT = 500mA
(PULSE-SKIP MODE)
I L
1871 F05
Figure 5. MODE/SYNC Clock Input and Switching
Waveforms for Synchronized Operation
I L
5A/DIV
2μs/DIV
1871 F04
Figure 4. LTC1871 Low Output Current Operation with
Burst Mode Operation Disabled (MODE/SYNC = INTV CC )
1871fe
10
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LTC1871EMS-1#PBF 功能描述:IC REG CTRLR BST FLYBK CM 10MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR)
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