参数资料
型号: LTC1877EMS8#TR
厂商: Linear Technology
文件页数: 11/18页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 0.6A 8MSOP
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 10 V
输入电压: 2.65 V ~ 10 V
PWM 型: 电流模式,混合
频率 - 开关: 550kHz
电流 - 输出: 600mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
供应商设备封装: 8-MSOP
LTC1877
APPLICATIONS INFORMATION
pacitors. The POSCAP solid electrolytic capacitor available
from Sanyo is an excellent choice for output bulk capacitors
due to its low ESR/size ratio. Once the ESR requirement
for C OUT has been met, the RMS current rating generally
far exceeds the I RIPPLE(P-P) requirement.
When using tantalum capacitors, it is critical that they are
surge tested for use in switching power supplies. A good
choice is the AVX TPS series of surface mount tantalum,
available in case heights ranging from 2mm to 4mm. Other
capacitor types include KEMET T510 and T495 series and
Sprague 593D and 595D series. Consult the manufacturer
for other speci?c recommendations.
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
The output of the phase detector is a pair of complementary
current sources charging or discharging the external ?lter
network on the PLL LPF pin. The relationship between the
voltage on the PLL LPF pin and operating frequency is
shown in Figure 4. A simpli?ed block diagram is shown
in Figure 5.
If the external frequency (V SYNC/MODE ) is greater than
550kHz, the center frequency, current is sourced con-
tinuously, pulling up the PLL LPF pin. When the external
frequency is less than 550kHz, current is sunk continuously,
pulling down the PLL LPF pin. If the external and internal
frequencies are the same but exhibit a phase difference,
the current sources turn on for an amount of time cor-
responding to the phase difference. Thus, the voltage on
the PLL LPF pin is adjusted until the phase and frequency
of the external and internal oscillators are identical. At
?
V OUT = 0.8V ? 1 +
?
R2 ?
?
R1 ?
(2)
800
700
The external resistive divider is connected to the output,
allowing remote voltage sensing, as shown in Figure 3.
600
0.8V
V OUT
R2
10V
500
400
V FB
LTC1877
R1
300
0
0.4
0.8 1.2
1.6
2.0
GND
V PLL LPF (V)
1877 F04
1877 F03
Figure 4. Relationship Between Oscillator
Figure 3. Setting the LTC1877 Output Voltage
Phase-Locked Loop and Frequency Synchronization
Frequency and Voltage at PLL LPF Pin
R LP
The LTC1877 has an internal voltage-controlled oscillator
PHASE
DETECTOR
2.4V
C LP
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external frequency source. The frequency range
of the voltage-controlled oscillator is 400kHz to 700kHz.
The phase detector used is an edge sensitive digital type
SYNC/
MODE
DIGITAL
PHASE/
FREQUENCY
DETECTOR
PLL LPF
VCO
that provides zero degrees phase shift between the external
and internal oscillators. This type of phase detector will
not lock up on input frequencies close to the harmonics
of the V CO center frequency. The PLL hold-in range Δf H is
equal to the capture range, Δf H = Δf C = ±150kHz.
1877 F05
Figure 5. Phase-Locked Loop Block Diagram
1877fb
11
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