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| 型号： | LTC1879EGN#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 1.2A 16SSOP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 10 V |
| 输入电压： | 2.65 V ~ 10 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 550kHz |
| 电流 - 输出： | 1.2A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-SSOP |
LTC1879
OPERATIO
(Refer to Block Diagram)
Power Good Indicator
The power good function monitors the output voltage in all
modes of operation. Its open-drain output is pulled low
when the output voltage is not within ± 7.5% of its nomi-
nally regulated voltage. The feedback voltage is filtered
before it is fed to a power good window comparator in
order to prevent false tripping of the power good signal
during fast transients. The window comparator monitors
the output voltage even in Burst Mode operation. In
shutdown mode, open drain is actively pulled low to
indicate that the output voltage is invalid.
Short-Circuit Protection
When the output is shorted to ground, the frequency of
the oscillator is reduced to about 80kHz, 1/7 the nominal
frequency. This frequency foldback ensures that the in-
ductor current has more time to decay, thereby preventing
runaway. The oscillator’s frequency will progressively
increase to 550kHz (or to the synchronized frequency)
when V FB rises above 0.3V.
Frequency Synchronization
The LTC1879 can be synchronized to an external clock
source connected to the SYNC/MODE pin. The turn-on of
the top MOSFET is synchronized to the rising edge of the
external clock.
Low Dropout Operation
When the input supply voltage decreases toward the
output voltage in a buck regulator, the duty cycle in-
creases toward the maximum on-time. Further reduction
of the supply voltage forces the main switch to remain on
for more than one cycle until it reaches 100% duty cycle.
The output voltage will then be determined by the input
voltage minus the voltage drop across the top MOSFET
and the inductor.
Low Supply Operation
The LTC1879 is designed to operate down to an input
supply voltage of 2.65V although the maximum allowable
output current is reduced at this low voltage. Figure 2
shows the reduction in the maximum output current as a
function of input voltage.
Another important detail to remember is that at low input
supply voltages, the R DS(ON) of the P-channel switch
increases. Therefore, the user should calculate the power
dissipation when the LTC1879 is used at 100% duty cycle
with low supply voltage (see Thermal Considerations in
the Applications Information section).
1800
1600
When the LTC1879 is clocked by an external source, Burst
1400
V OUT = 2.5V
Mode operation is disabled. In this synchronized mode,
when the output load current is very low, current compara-
tor, I COMP , may remain tripped for several cycles and force
the main switch to stay off for the same number of cycles.
Increasing the output load slightly allows constant fre-
quency PWM operation to resume.
1200
1000
800
600
V OUT = 1.8V
V OUT = 3.1V
Frequency synchronization is inhibited when the feedback
voltage V FB is below 0.6V. This prevents the external clock
400
2
3
4
5 6 7
INPUT VOLTAGE (V)
8
9 10
1879 F02
from interfering with the frequency foldback for short-
circuit protection.
Figure 2. Maximum Output Current vs Input Voltage
1879f
9
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