参数资料
型号: LTC1879EGN
厂商: Linear Technology
文件页数: 6/20页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 1.2A 16SSOP
标准包装: 100
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 10 V
输入电压: 2.65 V ~ 10 V
PWM 型: 电流模式,混合
频率 - 开关: 550kHz
电流 - 输出: 1.2A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 管件
供应商设备封装: 16-SSOP
LTC1879
PI FU CTIO S
SGND (Pin 1): Signal Ground Pin.
RUN/SS (Pin 2): Combination of Soft-Start and Run
Control Inputs. Forcing this pin below 0.7V shuts down the
device. In shutdown all functions are disabled and device
draws zero supply current. For the proper operation of the
part, force this pin above 2.5V. Do not leave this pin
floating. Soft-start can be accomplished by raising the
voltage on this pin gradually with an RC circuit.
V FB (Pin 3): Feedback Pin. Receives the feedback voltage
from an external resistor divider across the output.
I TH (Pin 4): Error Amplifier Compensation Point. The
current output increases with this control voltage. Nomi-
nal voltage range for this pin is 0.5V to 1.8V.
SWP1, SWP2 (Pins 5, 12): Upper Switch Nodes. These
pins connect to the drains of the internal main PMOS
switches and should always be connected together
externally.
SWN1, SWN2 (Pins 6, 11): Lower Switch Nodes. These
pins connect to the drains of the internal synchronous
NMOS switches and should always be connected together
PV IN1 , PV IN2 (Pins 8, 9): Power Supply Pins for the
Internal Drivers and Switches. These pins should always
be tied together.
SV IN (Pin 13): Signal Power Supply Pin.
PGOOD (Pin 14): Power Good Indicator Pin. Power good
is an open-drain logic output. The PGOOD pin is pulled to
ground when the voltage on the V FB pin is not within
± 7.5% of its nominally regulated potential. This pin re-
quires a pull-up resistor for power good indication. Power
good indication works in all modes of operation.
SYNC/MODE (Pin 15): External Clock Synchronization
and Mode Select Input. To synchronize, apply an external
clock with a frequency between 350kHz and 750kHz. To
select Burst Mode operation, tie pin to SV IN . Grounding
this pin selects pulse skipping mode. Do not leave this pin
floating.
PLL_LPF (Pin 16): Output of the Phase Detector and
Control Input of Oscillator. Connect a series RC lowpass
network from this pin to ground if externally synchronized.
If unused, this pin may be left open.
externally.
PGND1, PGND2 (Pins 7, 10): Power Ground Pins. Ground
pins for the internal drivers and switches. These pins
should always be tied together.
1879f
6
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