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参数资料
| 型号： | LTC1928ES6-5#TRMPBF |
| 厂商： | Linear Technology |
| 文件页数： | 5/8页 |
| 文件大小： | 0K |
| 描述： | IC REG SWITCHED CAP DBL SOT23-6 |
| 标准包装： | 500 |
| 类型： | 切换式电容器（充电泵），倍增器 |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 5V |
| 输入电压： | 2.7 V ~ 4.4 V |
| PWM 型： | Burst Mode? |
| 频率 - 开关： | 550kHz |
| 电流 - 输出： | 30mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 细型，TSOT-23-6 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | TSOT-23-6 |
| 其它名称： | LTC1928ES6-5#PBF LTC1928ES6-5#PBF-ND |
LTC1928-5
PI N FU N CTIO N S
V IN (Pin 1): Input Voltage, 2.7V to 4.4V. V IN should be
bypassed with a ≥ 2 μ F low ESR capacitor as close to the
pin as possible for best performance. A minimum capaci-
tance value of 0.1 μ F is required.
GND (Pin 2): System Ground.
V OUT (Pin 3): Low Noise Regulated Output Voltage. V OUT
should be bypassed with a ≥ 2 μ F low ESR capacitor as
close to the pin as possible for best performance. The V OUT
voltage is internally set to 5V.
APPLICATIO N S I N FOR M ATIO N
Operation
The LTC1928-5 uses a switched-capacitor charge pump
to generate a CPO voltage of approximately 2V IN . CPO
powers an internal low dropout linear regulator that sup-
plies a regulated output at V OUT . Internal comparators are
used to sense CPO and V IN voltages for power-up condi-
tioning. The output current is sensed to determine the
charge pump operating mode. A trimmed internal bandgap
is used as the voltage reference and a trimmed internal
oscillator is used to control the charge pump switches.
The charge pump is a doubler configuration that uses one
external flying capacitor. When enabled, a 2-phase
nonoverlapping clock controls the charge pump switches.
At start-up, the LDO is disabled and the load is removed
from CPO. When CPO reaches 1.75V IN the LDO is enabled.
If CPO falls below 1.45V IN the LDO will be disabled. Gen-
erally, the charge pump runs open loop with continuous
clocking for low noise. If CPO is greater than 1.95V IN and
I OUT is less than 200 μ A, the charge pump will operate in
Burst Mode operation for increased efficiency but slightly
higher output noise. In Burst Mode operation, the clock is
disabled when CPO reaches 1.95V IN and enabled when
CPO droops by about 150mV. The switching frequency is
precisely controlled to ensure that the frequency is above
455kHz and at the optimum rate to ensure maximum effi-
ciency. The switch edge rates are also controlled to mini-
mize noise. The effective output resistance at CPO is
CPO (Pin 4): Boosted Unregulated Voltage. Approxi-
mately 1.95V IN at low loads. Bypass with a ≥ 2 μ F low ESR
capacitor.
CP (Pin 5): Flying Capacitor Positive Input.
CN/SHDN (Pin 6): Flying Capacitor Negative Input and
SHDN. When this pin is pulled to ground through a 100 ?
resistor, the part will go into shutdown within approxi-
mately 30 μ s.
The LDO is used to filter the ripple on CPO and to set an
output voltage independent of CPO. V OUT is set by an
internal reference and resistor divider. The LDO requires a
capacitor on V OUT for stability and improved load transient
response. A low ESR capacitor of ≥ 2 μ F should be used.
Maximum I OUT Calculations
The maximum available current can be calculated based
on the open circuit CPO voltage, the dropout voltage of the
LDO and the effective output resistance of the charge
pump. The open circuit CPO voltage is approximately 2V IN
(see Figure 2).
Example:
V IN = 3V
V OUT = 5V
R CPO = 30 ?
Maximum unloaded CPO voltage = 2V IN = 6V
V DROPOUT(MAX) = 100mV
I OUT(MAX) = (2V IN – V DROPOUT(MAX) – V OUT )/R CPO
= (6V – 0.1V – 5V)/30 ? = 30mA
V CPO must be greater than 1.45V IN = 4.35V. To confirm
this, calculate V CPO :
V CPO = 6V – (30mA ? 30 ? ) = 5.1V
For minimum noise applications the LDO must be kept out
of dropout to prevent CPO noise from coupling into V OUT .
dependent on the voltage at V IN , CPO, the flying capacitor
value C FLY and the junction temperature. A low ESR ca-
pacitor of ≥ 2 μ F should be used at CPO for minimum noise.
5
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