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参数资料
| 型号： | LTC1928ES6-5#TRMPBF |
| 厂商： | Linear Technology |
| 文件页数： | 6/8页 |
| 文件大小： | 0K |
| 描述： | IC REG SWITCHED CAP DBL SOT23-6 |
| 标准包装： | 500 |
| 类型： | 切换式电容器（充电泵），倍增器 |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 5V |
| 输入电压： | 2.7 V ~ 4.4 V |
| PWM 型： | Burst Mode? |
| 频率 - 开关： | 550kHz |
| 电流 - 输出： | 30mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 细型，TSOT-23-6 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | TSOT-23-6 |
| 其它名称： | LTC1928ES6-5#PBF LTC1928ES6-5#PBF-ND |
LTC1928-5
APPLICATIO N S I N FOR M ATIO N
+ 2V IN
–
R CPO
V CPO
R DROPOUT
+ –
V DROPOUT
C CPO
V OUT
I OUT
A low ESR ceramic capacitor is recommended for the
flying capacitor C FLY with a value of 0.47 μ F. At low load or
high V IN a smaller capacitor could be used to reduce ripple
on CPO which would reflect as lower ripple on V OUT .
19285 F02
Figure 2. Equivalent Circuit
External CPO Loading
The CPO output can drive an external load (for example, an
LDO). The current required by this additional load will
reduce the available current from V OUT . If the external load
requires 1mA, the available current at V OUT will be reduced
by 1mA.
Short-Circuit and Thermal Protection
V OUT can be shorted to ground indefinitely. Internal cir-
cuitry will limit the output current. If the junction tempera-
ture exceeds 150 ° C the part will shut down. Excessive
power dissipation due to heavy loads will also cause the
part to shut down when the junction temperature exceeds
150 ° C. The part will become enabled when the junction
temperature drops below 140 ° C. If the fault conditions
remain in place, the part will cycle between the shutdown
and enabled states.
Capacitor Selection
For best performance it is recommended that low ESR
ceramic capacitors be used to reduce noise and ripple.
C OUT must be ≥ 2 μ F and C CPO must be equal to or greater
than C OUT . C IN is dependent on the input power supply
source impedance. The charge pump demands large
instantaneous currents which may induce ripple onto a
common voltage rail. C IN should be ≥ 2 μ F and a spike
reducing resistor of 2.2 ? may be required between V IN
and the supply.
If a minimum enable time is required, the CPO output filter
capacitor should be at least 2 × the V OUT filter capacitor.
When the LDO is first enabled, the CPO capacitor will
dump a large amount of charge into the V OUT capacitor. If
the drop in the CPO voltage falls below 1.45V IN the LDO
will be disabled and the CPO voltage will be required to
charge up to 1.75V IN to enable the LDO. The resulting
cycling extends the enable time.
Output Ripple
The output ripple on CPO includes a spike component
from the charge pump switches and a droop component
which is dependent on the load current and the value of C3.
The charge pump has been carefully designed to minimize
the spike component, however, low ESR capacitors are
essential to reduce the remaining spike energy effect on
the CPO voltage. C CPO should be increased for high load
currents to minimize the droop component. Ripple com-
ponents on CPO are greatly reduced at V OUT by the LDO,
however, C OUT should also be a low ESR capacitor to
improve filtering of the CPO noise.
Shutdown
When CN/SHDN = 0V, the part will be in shutdown, the
supply current will be < 8 μ A and V OUT will be shorted to
ground through a 160 ? switch. In addition, CPO will be
high impedance and disconnected from V IN and
CN/SHDN.
Shutdown is achieved by internally sampling the
CN/SHDN pin for a low voltage. Time between shutdown
samples is about 30 μ s. During the sample time the charge
pump switches are disabled and CN/SHDN must be pulled
to ground within 400ns. A resistor value between 100 ?
and 1k is recommended. Parasitic lead capacitance should
be minimized on the CN/SHDN pin.
6
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