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参数资料
| 型号： | LTC1929IG-PG#TR |
| 厂商： | Linear Technology |
| 文件页数： | 20/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 28-SSOP |
| 标准包装： | 2,000 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 360kHz |
| 占空比： | 99.5% |
| 电源电压： | 4 V ~ 36 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-SSOP（0.209"，5.30mm 宽） |
| 包装： | 带卷 (TR) |
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LTC1929/LTC1929-PG
APPLICATIO S I FOR ATIO
Supplying INTV CC power through the EXTV CC switch input
from an output-derived source will scale the V IN current
required for the driver and control circuits by the ratio
(Duty Factor)/(Efficiency). For example, in a 20V to 5V
application, 10mA of INTV CC current results in approxi-
mately 3mA of V IN current. This reduces the mid-current
loss from 10% or more (if the driver was powered directly
from V IN ) to only a few percent.
3) I 2 R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resistor,
and input and output capacitor ESR. In continuous mode
the average output current flows through L and R SENSE ,
but is “chopped” between the topside MOSFET and the
synchronous MOSFET. If the two MOSFETs have approxi-
mately the same R DS(ON) , then the resistance of one
MOSFET can simply be summed with the resistances of L,
R SENSE and ESR to obtain I 2 R losses. For example, if each
R DS(ON) =10m ? , R L =10m ? , and R SENSE =5m ? , then the
total resistance is 25m ? . This results in losses ranging
from 2% to 8% as the output current increases from 3A to
15A per output stage for a 5V output, or a 3% to 12% loss
per output stage for a 3.3V output. Efficiency varies as the
inverse square of V OUT for the same external components
and output power level. The combined effects of increas-
ingly lower output voltages and higher currents required
by high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switching
regulator system!
4) Transition losses apply only to the topside MOSFET(s),
and only when operating at high input voltages (typically
20V or greater). Transition losses can be estimated from:
Transition Loss = (1.7) V IN2 I O(MAX) C RSS f
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% efficiency degradation in portable systems. It is very
important to include these “system” level losses in the
design of a system. The internal battery and input fuse
resistance losses can be minimized by making sure that
C IN has adequate charge storage and a very low ESR at the
switching frequency. A 50W supply will typically require a
20
minimum of 200 μ F to 300 μ F of output capacitance having
a maximum of 10m ? to 20m ? of ESR. The LTC1929
2-phase architecture typically halves the input and output
capacitance requirements over competing solutions. Other
losses including Schottky conduction losses during dead-
time and inductor core losses generally account for less
than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, V OUT shifts by an
amount equal to ? I LOAD (ESR), where ESR is the effective
series resistance of C OUT ( ? I LOAD ) also begins to charge or
discharge C OUT generating the feedback error signal that
forces the regulator to adapt to the current change and
return V OUT to its steady-state value. During this recovery
time V OUT can be monitored for excessive overshoot or
ringing, which would indicate a stability problem. The
availability of the I TH pin not only allows optimization of
control loop behavior but also provides a DC coupled and
AC filtered closed loop response test point. The DC step,
rise time, and settling at this test point truly reflects the
closed loop response. Assuming a predominantly second
order system, phase margin and/or damping factor can be
estimated using the percentage of overshoot seen at this
pin. The bandwidth can also be estimated by examining
the rise time at the pin. The I TH external components
shown in the Figure 1 circuit will provide an adequate
starting point for most applications.
The I TH series R C -C C filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
(from 0.2 to 5 times their suggested values) to maximize
transient response once the final PC layout is done and the
particular output capacitor type and value have been
determined. The output capacitors need to be decided
upon because the various types and values determine the
loop feedback factor gain and phase. An output current
pulse of 20% to 80% of full-load current having a rise time
of <2 μ s will produce output voltage and I TH pin waveforms
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