参数资料
型号: LTC1960CUHF#TRPBF
厂商: Linear Technology
文件页数: 23/28页
文件大小: 0K
描述: IC BATT CHRGR/SELECTR DL 38-QFN
标准包装: 2,500
功能: 充电管理
电源电压: 6 V ~ 28 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 38-WFQFN 裸露焊盘
供应商设备封装: 38-QFN(5x7)
包装: 带卷 (TR)
LTC1960
APPLICATIONS INFORMATION
2 ( I MAX )
4 ( I MAX )
I LINEARMAX =
t = GATE
EMIconsiderationsusuallymakeitdesirabletominimize
ripple current in the battery leads, and beads or inductors
may be added to increase battery impedance at the 300kHz
switching frequency. Switching ripple current splits be-
tween the battery and the output capacitor depending on
the ESR of the output capacitor and the battery impedance.
If the ESR of C OUT is 0.2Ω and the battery impedance is
raised to 4Ω with a bead or inductor, only 5% of the cur-
rent ripple will flow in the battery.
PowerPath and Charge MUX MOSFET Selection
Three pairs of P-channel MOSFETs must be used with
the wall adapter and the two battery discharge paths. Two
pairs of N-channel MOSFETs must be used with the battery
charge path. The nominal gate drive levels are set by the
clamp drive voltage of their respective control circuitry.
This voltage is typically 6.25V. Consequently, logic-level
threshold MOSFETs must be used. Pay close attention to
the B VDSS specification for the MOSFETs as well; many of
the logic-level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the
on-resistance R DS(ON) , input voltage and maximum out-
put current. For the N-channel charge path, the maximum
current is the maximum programmed current to be used.
For the P-channel discharge path maximum current typi-
cally occurs at end of life of the battery when using only
one battery. The upper limit of R DS(ON) value is a function of
the actual power dissipation capability of a given MOSFET
package that must take into account the PCB layout. As a
starting point, without knowing what the PCB dissipation
capability would be, derate the package power rating by
a factor of two.
P MOSFET
R DS(ON)MAX = 2
If you are using a dual MOSFET package with both MOS-
FETs in series, you must cut the package power rating in
half again and recalculate.
P MOSFETDUAL
R DS(ON)MAX = 2
If you use identical MOSFETs for both battery paths, voltage
drops will track over a wide current range. The LTC1960
linear 25mV CV drop regulation will not occur until the
current has dropped below:
25mV
2 R DS(ON)MAX
However, if you try to use the above equation to determine
R DS(ON) to force linear mode at full current, the MOSFET
R DS(ON) value becomes unreasonably low for MOSFETs
available at this time. The need for the LTC1960 voltage
drop regulation only comes into play for parallel battery
configurations that terminate charge or discharge using
voltage. At first this seems to be a problem, but there are
several factors helping out:
1. When batteries are in parallel current sharing, the current
flow through any one battery is less than if it is running
standalone.
2. Most batteries that charge in constant-voltage mode,
such as Li-Ion, charge terminate at a current value of
C/10 or less which is well within the linear operation
range of the MOSFETs.
3. Voltage tracking for the discharge process does not
need such precise voltage tracking values.
The LTC1960 has two transient conditions that force the
discharge path P-channel MOSFETs to have two additional
parameters to consider. The parameters are gate charge
Q GATE and single pulse power capability.
When the LTC1960 senses a LOW_POWER event, all
the P-channel MOSFETs are turned on simultaneously
to allow voltage recovery due to a loss of a given power
source. However, there is a delay in the time it takes to
turn on all the MOSFETs. Slow MOSFETs will require more
bulk capacitance to hold up all the system’s power sup-
ply function during the transition and fast MOSFET will
require less bulk capacitance. The transition speed of a
MOSFET to an on or off state is a direct function of the
MOSFET gate charge.
Q
I DRIVE
1960fb
23
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