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参数资料
| 型号： | LTC2141IUP-14#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/38页 |
| 文件大小： | 0K |
| 描述： | IC ADC DUAL 14BIT 65 MSPS 64-QFN |
| 标准包装： | 2,000 |
| 位数： | 14 |
| 采样率（每秒）： | 40M |
| 数据接口： | 并联，串行，SPI |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 218mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-WFQFN 裸露焊盘 |
| 供应商设备封装： | 64-QFN（9x9） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个差分 |
| 配用： | DC890B-ND - BOARD USB DATA COLLECTION |
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15
21421014fa
LTC2142-14/
LTC2141-14/LTC2140-14
PIN FUNCTIONS
SENSE (Pin 63): Reference Programming Pin. Connecting
SENSE to VDD selects the internal reference and a ±1V input
range. Connecting SENSE to ground selects the internal
reference and a ±0.5V input range. An external reference
between 0.625V and 1.3V applied to SENSE selects an
input range of ±0.8 VSENSE.
Ground (Exposed Pad Pin 65): The exposed pad must be
soldered to the PCB ground.
FULL RATE CMOS OUTPUT MODE
All Pins Below Have CMOS Output Levels
(OGND to OVDD)
D2_0 to D2_13 (Pins 25, 26, 27, 28, 29, 30, 31, 32, 33,
34, 35, 36, 37, 38): Channel 2 Digital Outputs. D2_13 is
the MSB.
DNC (Pins 23, 24, 43, 44): Do not connect these pins.
CLKOUT– (Pin 39): Inverted Version of CLKOUT+.
CLKOUT+ (Pin 40): Data Output Clock. The digital outputs
normally transition at the same time as the falling edge
of CLKOUT+. The phase of CLKOUT+ can also be delayed
relative to the digital outputs by programming the mode
control registers.
D1_0 to D1_13 (Pins 45, 46, 47, 48, 49, 50, 51, 52, 53,
54, 55, 56, 57, 58): Channel 1 Digital Outputs. D1_13 Is
the MSB.
OF2 (Pin 59): Channel 2 Over/Underflow Digital Output. OF2
is high when an overflow or underflow has occurred.
OF1 (Pin 60): Channel 1 Over/Underflow Digital Output. OF1
is high when an overflow or underflow has occurred.
DOUBLE DATA RATE CMOS OUTPUT MODE
All Pins Below Have CMOS Output Levels
(OGND to OVDD)
D2_0_1 to D2_12_13 (Pins 26, 28, 30, 32, 34, 36, 38):
Channel 2 Double Data Rate Digital Outputs. Two data bits
are multiplexed onto each output pin. The even data bits
(D0, D2, D4, D6, D8, D10, D12) appear when CLKOUT+
is low. The odd data bits (D1, D3, D5, D7, D9, D11, D13)
appear when CLKOUT+ is high.
DNC (Pins 23, 24, 25, 27, 29, 31, 33, 35, 37, 43, 44, 45,
47, 49, 51, 53, 55, 57, 59): Do not connect these pins.
CLKOUT– (Pin 39):
Inverted Version of CLKOUT+.
CLKOUT+ (Pin 40): Data Output Clock. The digital outputs
normally transition at the same time as the falling and ris-
ing edges of CLKOUT+. The phase of CLKOUT+ can also
be delayed relative to the digital outputs by programming
the mode control registers.
D1_0_1 to D1_12_13 (Pins 46, 48, 50, 52, 54, 56, 58):
Channel 1 Double Data Rate Digital Outputs. Two data bits
are multiplexed onto each output pin. The even data bits
(D0, D2, D4, D6, D8, D10, D12) appear when CLKOUT+
is low. The odd data bits (D1, D3, D5, D7, D9, D11, D13)
appear when CLKOUT+ is high.
OF2_1 (Pin 60): Over/Underflow Digital Output. OF2_1 is
high when an overflow or underflow has occurred. The
over/underflow for both channels are multiplexed onto
this pin. Channel 2 appears when CLKOUT+ is low, and
Channel 1 appears when CLKOUT+ is high.
DOUBLE DATA RATE LVDS OUTPUT MODE
All Pins Below Have LVDS Output Levels. The Output
Current Level Is Programmable. There Is an Optional
Internal 100Ω Termination Resistor Between the Pins
of Each LVDS Output Pair.
D2_0_1–/D2_0_1+ to D2_12_13–/D2_12_13+ (Pins
25/26, 27/28, 29/30, 31/32, 33/34, 35/36, 37/38): Chan-
nel 2 Double Data Rate Digital Outputs. Two data bits are
multiplexed onto each differential output pair. The even
data bits (D0, D2, D4, D6, D8, D10, D12) appear when
CLKOUT+ is low. The odd data bits (D1, D3, D5, D7, D9,
D11, D13) appear when CLKOUT+ is high.
CLKOUT–/CLKOUT+ (Pins 39/40): Data Output Clock.
The digital outputs normally transition at the same time
as the falling and rising edges of CLKOUT+. The phase of
CLKOUT+ can also be delayed relative to the digital outputs
by programming the mode control registers.
DNC (Pins 23, 24, 43, 44): Do not connect these pins.
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相关代理商/技术参数 |
参数描述 |
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| LTC2142-14 | 制造商:LINER 制造商全称:Linear Technology 功能描述:12-Bit, 65Msps/ 40Msps/25Msps Low Power Dual ADCs |
| LTC2142CUP-12#PBF | 功能描述:IC ADC DUAL 12BIT 65MSPS 64-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
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| LTC2142CUP-14#PBF | 功能描述:IC ADC DUAL 14BIT 40 MSPS 64-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 其它有关文件:TSA1204 View All Specifications 标准包装:1 系列:- 位数:12 采样率（每秒）:20M 数据接口:并联 转换器数目:2 功率耗散（最大）:155mW 电压电源:模拟和数字 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-TQFP 供应商设备封装:48-TQFP（7x7） 包装:Digi-Reel® 输入数目和类型:4 个单端，单极；2 个差分，单极 产品目录页面:1156 (CN2011-ZH PDF) 其它名称:497-5435-6 |
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