参数资料
型号: LTC2171IUKG-14#TRPBF
厂商: Linear Technology
文件页数: 21/34页
文件大小: 0K
描述: IC ADC 14BIT SER/PAR 40M 52-QFN
标准包装: 2,000
位数: 14
采样率(每秒): 45M
数据接口: Serial LVDS
转换器数目: 4
功率耗散(最大): 293mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 52-WFQFN 裸露焊盘
供应商设备封装: 52-QFN(7x8)
包装: 带卷 (TR)
输入数目和类型: 2 Differential; 2 Single-Ended
配用: DC1371A-ND - BOARD USB DATA ACQUISITION HS
LTC2172-14/
LTC2171-14/LTC2170-14
28
21721014fb
applicaTions inForMaTion
GROUNDING AND BYPASSING
The LTC2172-14/LTC2171-14/LTC2170-14 requires a
printed circuit board with a clean unbroken ground plane.
A multilayer board with an internal ground plane in the
first layer beneath the ADC is recommended. Layout for
the printed circuit board should ensure that digital and
analog signal lines are separated as much as possible. In
particular, care should be taken not to run any digital track
alongside an analog signal track or underneath the ADC.
High quality ceramic bypass capacitors should be used at
the VDD, OVDD, VCM, VREF, REFH and REFL pins. Bypass
capacitorsmustbelocatedasclosetothepinsaspossible.
Of particular importance is the 0.1F capacitor between
REFH and REFL. This capacitor should be on the same
side of the circuit board as the A/D, and as close to the
device as possible (1.5mm or less). Size 0402 ceramic
capacitors are recommended. The larger 2.2F capacitor
between REFH and REFL can be somewhat further away.
Thetracesconnectingthepinsandbypasscapacitorsmust
be kept short and should be made as wide as possible.
The analog inputs, encode signals and digital outputs
should not be routed next to each other. Ground fill and
grounded vias should be used as barriers to isolate these
signals from each other.
HEAT TRANSFER
MostoftheheatgeneratedbytheLTC2172-14/LTC2171-14/
LTC2170-14istransferredfromthediethroughthebottom-
sideexposedpadandpackageleadsontotheprintedcircuit
board. For good electrical and thermal performance, the
exposed pad must be soldered to a large grounded pad
on the PC board. This pad should be connected to the
internal ground planes by an array of vias.
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