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参数资料
| 型号： | LTC2226IUH#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 4/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 25MSPS SAMPL 32-QFN |
| 标准包装： | 73 |
| 位数： | 12 |
| 采样率（每秒）： | 25M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 90mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，双极; 1 个差分，双极 |
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LTC2228/LTC2227/LTC2226
12
222876fb
PIN FUNCTIONS
AIN+ (Pin 1): Positive Differential Analog Input.
AIN– (Pin 2): Negative Differential Analog Input.
REFH (Pins 3, 4): ADC High Reference. Short together and
bypass to Pins 5, 6 with a 0.1μF ceramic chip capacitor as
close to the pin as possible. Also bypass to Pins 5, 6 with
an additional 2.2μF ceramic chip capacitor and to ground
with a 1μF ceramic chip capacitor.
REFL (Pins 5, 6): ADC Low Reference. Short together and
bypass to Pins 3, 4 with a 0.1μF ceramic chip capacitor as
close to the pin as possible. Also bypass to Pins 3, 4 with
an additional 2.2μF ceramic chip capacitor and to ground
with a 1μF ceramic chip capacitor.
VDD (Pins 7, 32): 3V Supply. Bypass to GND with 0.1μF
ceramic chip capacitors.
GND (Pin 8): ADC Power Ground.
CLK (Pin 9): Clock Input. The input sample starts on the
positive edge.
SHDN (Pin 10): Shutdown Mode Selection Pin. Connecting
SHDN to GND and OE to GND results in normal operation
with the outputs enabled. Connecting SHDN to GND and
OE to VDD results in normal operation with the outputs at
high impedance. Connecting SHDN to VDD and OE to GND
results in nap mode with the outputs at high impedance.
Connecting SHDN to VDD and OE to VDD results in sleep
mode with the outputs at high impedance.
OE (Pin 11): Output Enable Pin. Refer to SHDN pin
function.
NC (Pins 12, 13): Do Not Connect These Pins.
D0-D11 (Pins 14, 15, 16, 17, 18, 19, 22, 23, 24, 25, 26,
27): Digital Outputs. D11 is the MSB.
OGND (Pin 20): Output Driver Ground.
OVDD (Pin 21): Positive Supply for the Output Drivers.
Bypass to ground with 0.1μF ceramic chip capacitor.
OF (Pin 28): Over/Under Flow Output. High when an over
or under ow has occurred.
MODE (Pin 29): Output Format and Clock Duty Cycle
Stabilizer Selection Pin. Connecting MODE to GND selects
offset binary output format and turns the clock duty cycle
stabilizer off. 1/3 VDD selects offset binary output format
and turns the clock duty cycle stabilizer on. 2/3 VDD selects
2’s complement output format and turns the clock duty
cycle stabilizer on. VDD selects 2’s complement output
format and turns the clock duty cycle stabilizer off.
SENSE (Pin 30): Reference Programming Pin. Connecting
SENSE to VCM selects the internal reference and a ±0.5V
input range. VDD selects the internal reference and a ±1V
input range. An external reference greater than 0.5V and
less than 1V applied to SENSE selects an input range of
±VSENSE. ±1V is the largest valid input range.
VCM (Pin 31): 1.5V Output and Input Common Mode Bias.
Bypass to ground with 2.2μF ceramic chip capacitor.
Exposed Pad (Pin 33): ADC Power Ground. The Exposed
Pad on the bottom of the package needs to be soldered
to ground.
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相关代理商/技术参数 |
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|---|---|
| LTC2226IUH-TR | 制造商:LINER 制造商全称:Linear Technology 功能描述:12-Bit, 65/40/25Msps Low Power 3V ADCs |
| LTC2226IUH-TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:12-Bit, 65/40/25Msps Low Power 3V ADCs |
| LTC2226LX | 制造商:LINER 制造商全称:Linear Technology 功能描述:12-Bit, 25Msps 125°C ADC in LQFP |
| LTC2227 | 制造商:LINER 制造商全称:Linear Technology 功能描述:14-Bit, 80Msps Low Power 3V ADC |
| LTC2227CUH | 制造商:LINER 制造商全称:Linear Technology 功能描述:12-Bit, 65/40/25Msps Low Power 3V ADCs |
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