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参数资料
| 型号： | LTC2263IUJ-14#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | ADC |
| 英文描述： | PROPRIETARY METHOD ADC, QCC40 |
| 封装： | 6 X 6 MM, LEAD FREE, PLASTIC, QFN-40 |
| 文件页数： | 10/32页 |
| 文件大小： | 1451K |
| 代理商： | LTC2263IUJ-14#PBF |
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18
22654314fb
LTC2265-14/
LTC2264-14/LTC2263-14
CONVERTER OPERATION
The LTC2265-14/LTC2264-14/LTC2263-14 are low power,
2-channel, 14-bit, 65Msps/40Msps/25Msps A/D convert-
ers that are powered by a single 1.8V supply. The analog
inputsshouldbedrivendifferentially.Theencodeinputcan
be driven differentially for optimal jitter performance, or
single-ended for lower power consumption. To minimize
thenumberofdatalines,thedigitaloutputsareserialLVDS.
Each channel outputs two bits at a time (2-lane mode) or
one bit at a time (1-lane mode). Many additional features
canbechosenbyprogrammingthemodecontrolregisters
through a serial SPI port.
ANALOG INPUT
The analog inputs are differential CMOS sample-and-hold
circuits(Figure2).Theinputsshouldbedrivendifferentially
around a common mode voltage set by the VCM1 or VCM2
output pins, which are nominally VDD/2. For the 2V input
range, the inputs should swing from VCM – 0.5V to VCM
+ 0.5V. There should be a 180° phase difference between
the inputs.
The two channels are simultaneously sampled by a
shared encode circuit (Figure 2).
INPUT DRIVE CIRCUITS
Input Filtering
If possible, there should be an RC lowpass filter right
at the analog inputs. This lowpass filter isolates the
drive circuitry from the A/D sample-and-hold switching
and limits wideband noise from the drive circuitry.
Figure 3 shows an example of an input RC filter. The
RC component values should be chosen based on the
application’s input frequency.
APPLICATIONS INFORMATION
Transformer Coupled Circuits
Figure 3 shows the analog input being driven by an RF
transformer with a center-tapped secondary. The center
tap is biased with VCM, setting the A/D input at its opti-
mal DC level. At higher input frequencies a transmission
line balun transformer (Figures 4 to 6) has better balance,
resulting in lower A/D distortion.
CSAMPLE
3.5pF
RON
25
RON
25
VDD
LTC2265-14
AIN+
226514 F02
CSAMPLE
3.5pF
VDD
AIN–
ENC–
ENC+
1.2V
10k
1.2V
10k
CPARASITIC
1.8pF
CPARASITIC
1.8pF
10
Figure 2. Equivalent Input Circuit. Only One of
the Two Analog Channels Is Shown.
25
50
0.1F
AIN+
AIN–
12pF
0.1F
VCM
LTC2265-14
ANALOG
INPUT
0.1F
T1
1:1
T1: MA/COM MABAES0060
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
226514 F03
Figure 3. Analog Input Circuit Using a Transformer.
Recommended for Input Frequencies from 5MHz to 70MHz
相关PDF资料 |
PDF描述 |
|---|---|
| LTC2264CUJ-14#PBF | PROPRIETARY METHOD ADC, QCC40 |
| LTC2265CUJ-14#TRPBF | PROPRIETARY METHOD ADC, QCC40 |
| LTC2265IUJ-14#PBF | PROPRIETARY METHOD ADC, QCC40 |
| LTC2265IUJ-12#PBF | PROPRIETARY METHOD ADC, QCC40 |
| LTC2265CUJ-12#TRPBF | PROPRIETARY METHOD ADC, QCC40 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC2263IUJ-14TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
| LTC2264-12 | 制造商:LINER 制造商全称:Linear Technology 功能描述:12-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
| LTC2264-14 | 制造商:LINER 制造商全称:Linear Technology 功能描述:Quad 14-Bit, 125Msps ADC with Integrated Drivers |
| LTC2264CUJ-12#PBF | 功能描述:IC ADC 12BIT SER/PAR 40M 40-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| LTC2264CUJ-12#TRPBF | 功能描述:IC ADC 12BIT SER/PAR 40M 40-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
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