参数资料
型号: LTC2265CUJ-12#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: ADC
英文描述: PROPRIETARY METHOD ADC, QCC40
封装: 6 X 6 MM, LEAD FREE, PLASTIC, QFN-40
文件页数: 31/34页
文件大小: 1231K
代理商: LTC2265CUJ-12#PBF
6
22654312fb
LTC2265-12/
LTC2264-12/LTC2263-12
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 9)
SYMBOL PARAMETER
CONDITIONS
LTC2265-12
LTC2264-12
LTC2263-12
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
VDD
Analog Supply Voltage (Note 10)
l
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
OVDD
Output Supply Voltage (Note 10)
l
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
IVDD
Analog Supply Current Sine Wave Input
l
82
98
52
63
42
50
mA
IOVDD
Digital Supply Current 1-Lane Mode, 1.75mA Mode
1-Lane Mode, 3.5mA Mode
2-Lane Mode, 1.75mA Mode
2-Lane Mode, 3.5mA Mode
l
11
20
15
28
18
31
10
19
15
28
18
31
10
18
14
27
17
31
mA
PDISS
Power Dissipation
1-Lane Mode, 1.75mA Mode
1-Lane Mode, 3.5mA Mode
2-Lane Mode, 1.75mA Mode
2-Lane Mode, 3.5mA Mode
l
167
184
175
198
209
232
112
128
121
144
146
169
94
108
101
124
121
146
mW
PSLEEP
Sleep Mode Power
1
mW
PNAP
Nap Mode Power
60
mW
PDIFFCLK Power Increase with Differential Encode Mode Enabled
(No Increase for Sleep Mode)
20
mW
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
LTC2265-12
LTC2264-12
LTC2263-12
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
fS
Sampling Frequency
(Notes 10, 11)
l
5
65
5
40
5
25
MHz
tENCL
ENC Low Time (Note 8) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
7.3
2
7.69
100
11.88
2
12.5
100
19
2
20
100
ns
tENCH
ENC High Time (Note 8) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
7.3
2
7.69
100
11.88
2
12.5
100
19
2
20
100
ns
tAP
Sample-and-Hold
Acquisition Delay Time
0
ns
相关PDF资料
PDF描述
LTC2263IUJ-12#PBF PROPRIETARY METHOD ADC, QCC40
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