参数资料
型号: LTC2272CUJ#TR
厂商: LINEAR TECHNOLOGY CORP
元件分类: ADC
英文描述: 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40
封装: 6 X 6 MM, PLASTIC, QFN-40
文件页数: 11/44页
文件大小: 767K
代理商: LTC2272CUJ#TR
LTC2273/LTC2272
19
22732fa
DEFINITIONS
the standard denes an additional set of 12 special code-
groups for non-data characters such as commas. Special
code-group names begin with K instead of D. A complete
8B/10B description is found in Clause 36.2 of IEEE Std
802.3-2002 part3.
Current Mode Logic (CML)
A technique used to implement differential high-speed logic.
CML employs differential pairs (usually n-type) to steer
current into resistive loads. It is possible to implement any
logic function using CML. The output swing and offset is
dependant on the bias current, the load resistance, and
termination resistance.
This product family uses CML drivers to transmit high-
speed serial data to the outside world. The output driver
bias current is typically 16mA, generating a signal swing
potential of 400mVP-P (800mVP-P diff.) across the com-
bined internal and external termination resistance of 25Ω
on each output.
Code-Group
The 10-bit output from an 8B/10B encoder or the 10-bit
input to the 8B/10B decoder.
Comma
A special 8B/10B code-group containing the binary se-
quence “0011111” or “1100000”. Commas are used for
frame alignment and synchronization because a comma
sequence cannot be generated by any combination of
normal code-groups (unless a bit error occurs). There are
three special code-groups that contain a comma, K28.1,
K28.5, and K28.7.
For brevity, each of these three special code-groups are
often called a comma, but in the strictest sense it is the
rst 7 bits of these code-groups that are designated a
comma.
DC Balanced Signal
A specially conditioned signal that may be AC coupled with
minimal degradation to the signal. DC balance is achieved
when the average number of 1’s and 0’s are equal, eliminat-
ing the undesirable effects of DC wander on the receive
side of the coupling capacitor. When 8B/10B coding is
used, DC balance is achieved by following disparity rules
(see Running Disparity).
De-Scrambler
A logic block that restores scrambled data to its pre-
scrambled state. A self aligning de-scrambler is based on
the same pseudo random bit sequence as the scrambler,
so it requires no alignment signals. In this product family
the scrambler is based on the 1 + x14 + x15 polynomial,
and the self aligning process results in an initial loss of
one ADC sample.
Frame
A group of octets or code-groups that make up one
complete word. For this product family, a frame consists
of two complete octets or code-groups, and constitutes
one ADC sample.
Frame Alignment Monitoring (FAM)
After initial frame synchronization has been established,
frame alignment monitoring enables the receiver to verify
that code-group alignment is maintained without the loss
of data. This is done by substituting a K28.7 comma for the
last code-group of the frame when certain conditions are
met. The receiver uses this comma as a position marker
within the frame for alignment verication. After decoding
the data, the receiver replaces the K28.7 comma with the
original data.
Idle Frame Synchronization Mode (ISMODE)
A special synchronization mode where idle ordered sets
are used to establish initial frame synchronization instead
of K28.5 commas.
An Idle Ordered Set is dened in the IEEE Std 802.3-2002
part3, Clause 36.2.4.12. In general, it is a K28.5 comma
followed by either a D5.6 or a D16.2. If the running dispar-
ity after the transmission of the K28.5 comma is positive,
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LTC2272IUJ 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40
LTC2273CUJ#TR 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40
LTC2272CUJ 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40
LTC2273CUJ 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40
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