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参数资料
| 型号： | LTC2272CUJ |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| 封装： | 6 X 6 MM, PLASTIC, QFN-40 |
| 文件页数： | 21/44页 |
| 文件大小： | 767K |
| 代理商： | LTC2272CUJ |
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LTC2273/LTC2272
28
22732fa
APPLICATIONS INFORMATION
Initial Frame Synchronization
In the absence of a frame clock, it is necessary to deter-
mine the start of each frame through a synchronization
process. To establish frame synchronization, Figures 14
and 15 illustrate the following sequence:
The receiver issues a synchronization request via the
synchronization interface.
If the synchronization request is active for more than
one ENC clock cycle, the LTC2273/LTC2272 will transmit
a synchronization preamble. When the ISMODE pin is
low the transmitted preamble will consist of consecu-
tive K28.5 comma symbols in conformance with the
JESD204 specication. When the ISMODE pin is high,
a series of idle ordered sets will be transmitted. The
idle ordered sets consist of a K28.5 comma followed by
either D5.6 or D16.2 as dened in IEEE Std 802.3-2002
part3, Clause 36.2.4.12.
The receiver searches for the expected preamble and
waits for the correct reception of an adequate number
of preamble characters.
The receiver deactivates the synchronization request.
Upon detecting the deactivation of the synchronization
request, the LTC2273/LTC2272 continue to transmit the
synchronization preamble until the end of the frame.
At the start of the next frame, the LTC2273/LTC2272
will begin transmitting data characters.
The receiver designates the rst data character received
after the preamble transmission to be the start of the
frame. The rst octet of the frame contains the most
signicant byte of the ADC’s output word.
Figure 13. Timing Relationship of Analog Sample to Serial Data Out
N – 6
N – 10
N – 9
N – 8
N – 1
N
N – 5
N – 4
N + 3
N + 4
N – 9
N – 8
N – 7
N
N + 1
tH
tCONV
LATP
tL
tAP
tBIT
N
N + 1
N + 2
N + 8
N + 9
22732 F13
N + 10
ANALOG INPUT
ENC+
INTERNAL
PARALLEL DATA
INTERNAL
8B/10B DATA
SERIAL DATA OUT
相关PDF资料 |
PDF描述 |
|---|---|
| LTC2273CUJ | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2272IUJ#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2273IUJ#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2273IUJ | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2274CUJ#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC2272CUJ#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 65Msps 16-bit Serial 40-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 65MSPS 40-QFN 制造商:Linear Technology 功能描述:A/D Converter IC 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, 65MSPS, QFN-40; Resolution (Bits):16bit; Sampling Rate:65MSPS; Supply Voltage Type:Single; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Supply Current:300mA; Digital IC Case Style:QFN; No. of Pins:40 ;RoHS Compliant: Yes |
| LTC2272CUJ#TRPBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 65Msps 16-bit Serial 40-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16BIT 65MSPS 40-QFN |
| LTC2272CUJ-PBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Serial Output ADC |
| LTC2272CUJ-TR | 制造商:LINER 制造商全称:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Serial Output ADC |
| LTC2272CUJ-TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Serial Output ADC |
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